Project Idea Start

flux

I’ll diagnose whether the blank pages come from the PDF renderer or malformed layout geometry, then generate a fallback PDF from a verified visible board rendering. I will not modify the PCB.
Thought for 3 mins 29 sec
Referenced guidance.
1/3 Inspect board geometry and native PDF export failure

Inspect board geometry and native PDF export failure

Generate a fallback PDF containing the visible PCB layout

Open and verify the fallback PDF before delivery

Thought for 26 sec — Exploring PDF generation options
Thought for 11 sec
Awaiting 1 background task
Received notification from "Blank PCB PDF Fix" that it finished — picking the work back up.

flux

The fallback-export executor has completed. I’m retrieving its artifact and verification report now, then I’ll independently confirm the PDF contains visible board content before sending it.

flux

The native exporter produced 11 blank pages despite valid PCB geometry. I generated a one-page fallback from the board outline, top copper, and top silkscreen layers and verified that it contains visible layout content.
Download the verified PCB layout PDF
Fix U7 footprint
Prepare routing rules
Finish placement cleanup
Generate manufacturing package
Sign up to send

Files

Schematic

Layout

Preview

U4
J1
U3
U1
J3
C14
Capacitance
22nF
R19
Resistance
100kΩ
R16
Resistance
4.7kΩ
R7
Resistance
1MΩ
C27
Capacitance
100nF
C16
Capacitance
22nF
C18
Capacitance
10uF
R6
Resistance
1MΩ
C4
Capacitance
4.7uF
C28
Capacitance
100nF
R15
Resistance
4.7kΩ
C19
Capacitance
22uF
C25
Capacitance
100nF
R11
Resistance
1.5kΩ
R14
Resistance
10kΩ
C13
Capacitance
22nF
C24
Capacitance
10uF
C20
Capacitance
10uF
C10
Capacitance
4.7uF
R4
Resistance
1kΩ
R18
Resistance
100kΩ
R17
Resistance
330Ω
R10
Resistance
1MΩ
C21
Capacitance
47uF
R1
Resistance
10kΩ
C9
Capacitance
100nF
C8
Capacitance
10uF
R8
Resistance
1MΩ
R5
Resistance
1MΩ
C1
Capacitance
100nF
C26
Capacitance
10F
R9
Resistance
1MΩ
R12
Resistance
1.5kΩ
C2
Capacitance
10uF
C11
Capacitance
30pF
C17
Capacitance
100nF
C23
Capacitance
100nF
C6
Capacitance
100nF
C15
Capacitance
22nF
R3
Resistance
1kΩ
C7
Capacitance
4.7uF
R13
Resistance
10kΩ
R2
Resistance
33Ω
C3
Capacitance
100nF
C12
Capacitance
30pF
C22
Capacitance
10uF
C5
Capacitance
10uF
D1
LED1
U6
Q1
D4
U7
D2
D3
J2
L1
Inductance
33uH
Y1
U5
L2
Inductance
10uH
U2
Project Specification
Project Overview
  • Status: Draft
  • Battery-free wireless IoT sensor node for motor condition monitoring.
  • Harvests energy from a current-transformer clamp and stores it in a 10 F lithium hybrid supercapacitor.
Intended Use
  • Mounted near an AC motor or monitored conductor.
  • CT clamp supplies harvested energy and a current waveform for motor-current signature analysis.
  • Production-intent PCB assembled using JLCPCB-compatible processes.
What the Device Should Do
  • Operate without a primary battery.
  • Harvest and store CT-derived energy.
  • Measure temperature, environmental conditions, magnetic flux, vibration, and motor current waveform.
  • Process sensor data and FFT features locally.
  • Communicate over a 2.4 GHz Wirepas mesh network.
  • Switch sensor power off between measurement cycles.
Main Features
  • AEM13921 dual-source energy-harvesting PMIC.
  • HSL0814-3R8106-R, 10 F / 3.8 V lithium hybrid supercapacitor.
  • Raytac MDBT50Q-1MV2 nRF52840 module.
  • TMP117, BME688, and MLX90393 on I2C.
  • ADXL355 on SPI.
  • CT waveform ADC input.
  • SWD Tag-Connect programming/debug and green status LED.
System Architecture
Diagram



  
    
  
  
    
  























CT Clamp
BAT54S Rectification
AEM13921 Energy Harvester
10 F Hybrid Supercapacitor
3.3 V LOAD Rail
nRF52840 Module
Sensor Power Switch
I2C and SPI Sensors
Burden and ADC Bias Network
2.4 GHz Wirepas
Tag-Connect SWD
Hardware Subsystems
Energy Harvesting and Storage
  • JST-PH 2-pin CT input.
  • BAT54S-based full-wave rectification as specified.
  • AEM13921 configured to charge the specified 3.8 V storage element and provide a regulated 3.3 V LOAD rail.
  • Datasheet-recommended PMIC passives and configuration must be used.
Compute and Radio
  • Raytac MDBT50Q-1MV2 nRF52840 module.
  • Wirepas mesh firmware target.
  • Verify whether the specified module antenna architecture is compatible with the separately requested Johanson antenna before PCB layout.
Sensors
  • I2C: TMP117AIDRVR, BME688, MLX90393; one 4.7 kΩ pull-up pair to 3.3 V.
  • SPI: ADXL355BEZ with CS P0.24, SCLK P0.19, MOSI P0.20, MISO P0.22, INT1 P0.13.
  • Sensor supply controlled from P0.16 through a PMV65XP high-side P-channel MOSFET.
Analog Current Input
  • CT signal sampled through a 33 Ω burden and 10 kΩ / 10 kΩ bias network into P0.30.
  • Input protection, filtering, ADC range, and separation from the harvester path must be verified against CT output limits.
Debug and Indicators
  • TC2030-MCP-NL Tag-Connect SWD footprint.
  • Green 0402 LED driven by P0.31 through 330 Ω.
Interfaces and Connections
  • CT clamp: JST-PH 2-pin.
  • I2C at 3.3 V.
  • SPI at 3.3 V.
  • SWDIO, SWDCLK, RESET, 3.3 V, and GND at Tag-Connect.
Power and Runtime Expectations
  • Energy-autonomous operation; measurement and radio duty cycle must adapt to harvested energy availability.
  • Sensors are powered only on demand.
  • 100 nF local decoupling at every applicable VDD pin and 10 µF rail bulk capacitance.
Power Tree and Power Budget
  • CT AC → rectifier → AEM13921 → supercapacitor and regulated 3.3 V LOAD.
  • Peak load includes nRF52840 radio transmission plus all enabled sensors.
  • Exact sleep, acquisition, and radio current budget will be finalized from component datasheets during schematic implementation.
Manufacturing and Assembly Expectations
  • 80 mm diameter circular PCB.
  • 4-layer FR4, ENIG finish.
  • JLCPCB-compatible design rules and assembly packages.
  • Predominantly SMD assembly; 0402 LED and compact sensor packages as specified.
Firmware-Relevant Hardware Requirements
  • P0.16 sensor power enable.
  • P0.30 CT waveform ADC.
  • P0.31 status LED.
  • SPI pins: P0.24 CS, P0.19 SCLK, P0.20 MOSI, P0.22 MISO, P0.13 INT1.
  • I2C pins to be selected from available module GPIOs while avoiding reserved/debug/radio functions.
  • SWD programming and debug access.
Physical Design Expectations
  • 80 mm circular outline.
  • Antenna at PCB edge/corner with 3 mm copper keepout on all layers, subject to antenna/module datasheet verification.
  • Keep conductors, mounting hardware, and enclosure features out of the antenna region.
Important Design Decisions
  • Energy harvesting rather than a primary battery.
  • Hybrid supercapacitor storage.
  • nRF52840 module to reduce RF and certification risk.
  • Load-switching all sensors to minimize standby current.
Assumptions
  • Common ground is used for the PMIC, MCU, and sensors.
  • The AEM13921 LOAD rail can support the verified peak load and startup sequence.
  • The CT arrangement can simultaneously support harvesting and current waveform measurement; this requires validation against the actual CT model and motor-current range.
Change Notes
  • Initial specification captured from the supplied IQ PCB PDF.

  • Project Overview

  • Intended Use

  • What the Device Should Do

  • Main Features

  • System Architecture

  • Hardware Subsystems

  • Energy Harvesting and Storage

  • Compute and Radio

  • Sensors

  • Analog Current Input

  • Debug and Indicators

  • Interfaces and Connections

  • Power and Runtime Expectations

  • Power Tree and Power Budget

  • Manufacturing and Assembly Expectations

  • Firmware-Relevant Hardware Requirements

  • Physical Design Expectations

  • Important Design Decisions

  • Assumptions

  • Change Notes