Smart Motor Starter PCB Design

Thought for 39 sec

flux

Yes — the best next sequence is:

Swap in your corrected J1 part and reconnect only the real SIM pins
- Connect only:
  - VCC -> SIM_VCC
  - RST -> SIM_RST
  - CLK -> SIM_CLK
  - I/O -> SIM_IO
  - GND and shell -> GND_CTRL
- Leave VPP, RESERVED_1, and RESERVED_2 unconnected as true Not Connected pins. That is the correct fix path for NC-style pins, and Flux pin typing should reflect that in the part definition rather than by adding fake wires
Re-run ERC immediately after the J1 replacement
- If the part was created correctly, the false VPP power error should disappear.
- Any remaining Missing Power errors after that are likely real and should be reviewed one by one.
- For power-type pins, use the datasheet/part definition as the source of truth; don’t guess or force connections just to silence ERC
Fix remaining real “Missing Power” items before touching layout
- For each remaining power-input warning, decide whether the pin is:
  - a real supply pin that must be wired, or
  - an optional/NC pin that belongs in the part definition as Not Connected.
- Likely candidates to review are unfinished support/status pins on U1, optional modem pins on U3, and any connector pins still typed incorrectly.
- The rule is: wire real required pins, reclassify true NC pins, don’t fake-connect
Triage floating pins into three buckets
- Must connect: required control/power pins for the circuit to function.
- Intentionally unused: optional pins on ESP1 and U3 that the datasheet allows to remain open.
- Bad part-definition artifacts: pins that should really be Not Connected in the part itself.
- This is exactly the recommended workflow for pin cleanup: use the datasheet as truth, map pins to the correct Flux pin types, and classify NC pins explicitly as Not Connected
After ERC is down to only intentional opens, attack the airwires
- The recommended PCB workflow is:
  - inspect
  - setup
  - annotate
  - group
  - ui-place
  - route
- For your board, that means:
  - Re-pack parts to fit the 100 x 100 mm board
  - Place connectors, LEDs, SIM socket, relay, and mounting holes first
  - Maintain the AC/DC isolation boundary
  - Route power and relay current paths first
  - Then route low-speed control/UART/SIM signals
- The layout guidance specifically says UI/mechanical parts and mounting features should be handled before final routing, and routing should prioritize net classes and current needs
Use DRC/ERC as the stop condition
- When J1 is corrected, the goal is:
  - no false connector power errors
  - only intentional floating optional pins
  - then reduce airwires to zero through placement/routing
- After that, do the final BOM cleanup and export.

Practical order I’d follow

Replace/reconnect corrected J1
Re-run ERC
Clear remaining real Missing Power items
Clear/justify remaining floating pins on ESP1, U3, and U1
Finish placement
Route all airwires
Re-run DRC/ERC
Finalize BOM

If you want, I can turn this into a pin-by-pin cleanup checklist for J1, U3, ESP1, and U1.

Create cleanup checklist

Check remaining ERC

Inspect airwires

Review board layout

PS1

Reviews

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