Schematic Design Review
just remove the esp32 from the circuit and instead use a pin header.
Thought for 6 sec
I’ll replace the ESP32-C3 module interface with a simple pin header while preserving the existing signals for an external controller connection, then verify the schematic connectivity.
Worked for 3 mins 39 sec
Done — I removed the ESP32-C3 module
U4 and replaced it with J2, a 1x08 external-controller pin header.J2 pinout:
- Pin 1:
3V3 - Pin 2:
GND - Pin 3:
SDA - Pin 4:
SCL - Pin 5:
ALT - Pin 6:
ADR - Pin 7:
DQ - Pin 8:
GND
Verification passed: the new header nets are connected and ERC checks showed no open schematic issues. I also updated Concise BOM - Part Name, Value, Designators and Circuit and Documentation Reverification.
Fix issues and verify
Add ALRT pull-up
Make pull-ups populated
Update all documentation
Run full review
Explain header wiring
Refine this doc
Ask about this doc
Circuit and Documentation Reverification
Date: 2026-07-11
Project: ESP32-C3 ADS1115 pH ORP Sensor Interface 4412
Latest Change
The onboard ESP32-C3 Supermini module
U4 was removed from the schematic and replaced with J2, a 1x08 through-hole external-controller header.J2 External Controller Header Pinout
Table
| J2 Pin | Net | Function |
|---|---|---|
| 1 | 3V3 | External regulated 3.3 V rail / board power rail |
| 2 | GND | Ground |
| 3 | SDA | ADS1115 I2C SDA |
| 4 | SCL | ADS1115 I2C SCL |
| 5 | ALT | ADS1115 ALERT/RDY, optional |
| 6 | ADR | ADS1115 ADDR control, also pulled down by R14 |
| 7 | DQ | DS18B20 1-Wire data |
| 8 | GND | Ground |
Live Schematic / Netlist Status
Current verification confirmed:
U4is no longer present in the live schematic.J2is present asPin Header 01x08 2.54mm Vertical.J2:1connects to3V3.J2:2andJ2:8connect toGND.J2:3connects toSDA.J2:4connects toSCL.J2:5connects toALT.J2:6connects toADR.J2:7connects toDQ.
ERC-style checks for floating pins, power pins, no-connects, single-pin nets, undriven nets, pin-to-pin conflicts, driver conflicts, unconnected wire endpoints, and missing footprints returned no open issues after the replacement.
Issues Removed by This Change
- The previous ESP32-C3 boot-strapping concern from routing I2C to GPIO8/GPIO9 is removed because the board no longer assigns those nets to ESP32 pins. The external controller now chooses its own safe SDA/SCL pins.
- The ESP32-C3 Supermini direct
3V3power-entry concern is removed from the schematic because the module is no longer fitted.
Remaining Design Notes
R7andR8are still optional/DNP I2C pull-ups. Populate them if the external controller or ADS1115 module does not already provide valid 3.3 V I2C pull-ups.ALTstill has no external pull-up. If ADS1115 ALERT/RDY is used, add a pull-up to3V3or ensure the external controller enables an internal pull-up.- U1 is still represented as
ADS1115 Modulewith family-style MPNADS111X; the exact purchasable module should be controlled before manufacturing. USB5andBATare still singleton external power-interface nets on J6;J6:Pin_3/3INmust be a regulated 3.3 V input if used to feed the board.- J1/J5 BNC shell pins are still symbol pins named
GNDwhile intentionally connected to biased reference netsPHRandORR, not systemGND; this should be clearly annotated or renamed to avoid accidental grounding.
Documentation Notes
Older ESP32-specific firmware files remain in the project and should now be treated as historical references, not current build documentation. Firmware guidance should be rewritten around
J2 as a generic external-controller header rather than an onboard ESP32-C3 module.Latest Change
J2 External Controller Header Pinout
Live Schematic / Netlist Status
Issues Removed by This Change
Remaining Design Notes
Documentation Notes
