I’ll audit the part metadata, locate and attach the official TI datasheet if needed, then cross-check the symbol pins, footprint, and descriptions against it and report any discrepancies.

I’m reading the current part definition and PCB land pattern first, then I’ll compare every terminal against TI’s package and pin tables.

The part is a 36-terminal part project; I’m paging through all terminals and the footprint geometry now.

Initial inspection found all 36 pads and the expected 0.65 mm lead pitch; terminal metadata is sparse, so the datasheet comparison will focus closely on names, types, and package geometry.

The official TI datasheet was already attached. The pin numbering/names are functionally correct, but I found a significant footprint row-spacing error plus missing pin types/descriptions and have filed a library quality report.

Audit complete for UCC14141QDWNRQ1: the official TI datasheet was already set; MPN, manufacturer, 36-pin count, SMD mount, description, pin numbering, and pin names match. Key specs: 8–18 V input, adjustable 15–25 V isolated output, 1.5 W nominal, 5 kVRMS isolation, AEC-Q100, −40°C to 125°C ambient, and DWN 36-pin SSOP/SO-MOD package.

Flagged mismatches: footprint row spacing is 9.45 mm instead of TI’s 9.95 mm, and pads are 1.90 × 0.45 mm rather than 1.85 × 0.45 mm; package metadata says only “Module”; all terminals lack datasheet pin descriptions and have Pin Type = Unspecified. I filed an internal quality report; the footprint should be corrected before production use.