Part Datasheet Audit


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Checking STM32H563VGT6 Pin Review progress…
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Reading STM32H563VGT6 Pin Review's report…
Thought for 14 sec — Evaluating section compactness
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Received notification from "STM32H563VGT6 Pin Reorg" that it finished — picking the work back up.
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Checking STM32H563VGT6 Pin Reorg progress…
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Reorganized all 100 STM32H563VGT6 terminals without changing pin names, numbers, mappings, or footprint assignments. Power is first, Ground last, Pin Group is removed, terminal orders are unique 1–100, and all sections are balanced within one pin.
  • Power: 11 pins, 6L/5R
  • GPIO / Multifunction: 76 pins, 38L/38R
  • Clock / Reset / Boot / Reference: 6 pins, 3L/3R
  • Ground: 7 pins, 3L/4R
Independent verification passed all structural and datasheet checks. The symbol is substantially more compact and symmetric, though some GPIO labels remain crowded due to the 100-pin density and immutable pin-label/position constraints.

PA14
Pin Number
76
PC4
Pin Number
33
VSS_4
Pin Number
74
PC7
Pin Number
64
PA6
Pin Number
31
VDD_5
Pin Number
100
PB14
Pin Number
53
VCAP_1
Pin Number
48
PH0-OSC_IN
Pin Number
12
PB8
Pin Number
95
PD5
Pin Number
86
PD9
Pin Number
56
PD6
Pin Number
87
VSS_1
Pin Number
10
VDDA
Pin Number
22
PA15
Pin Number
77
PD3
Pin Number
84
PD11
Pin Number
58
PA3
Pin Number
26
VCAP_2
Pin Number
98
PE10
Pin Number
41
PD13
Pin Number
60
PA7
Pin Number
32
PC14-OSC32_IN
Pin Number
8
PC8
Pin Number
65
VSS_2
Pin Number
27
PE12
Pin Number
43
VREF+
Pin Number
21
PA5
Pin Number
30
PE4
Pin Number
3
PD0
Pin Number
81
PH1-OSC_OUT
Pin Number
13
PE8
Pin Number
39
PE13
Pin Number
44
PB2
Pin Number
37
VREF-
Pin Number
20
PC3
Pin Number
18
PB9
Pin Number
96
PC9
Pin Number
66
VDD_3
Pin Number
50
PE9
Pin Number
40
BOOT0
Pin Number
94
PD7
Pin Number
88
PA13
Pin Number
72
PB6
Pin Number
92
VDDUSB
Pin Number
73
PD4
Pin Number
85
PA11
Pin Number
70
PA0
Pin Number
23
PD15
Pin Number
62
PE15
Pin Number
46
PD1
Pin Number
82
PB3
Pin Number
89
PB10
Pin Number
47
PC12
Pin Number
80
PD2
Pin Number
83
PB4
Pin Number
90
PA2
Pin Number
25
PA12
Pin Number
71
PE5
Pin Number
4
PC13
Pin Number
7
PA1
Pin Number
24
PE11
Pin Number
42
VSS_3
Pin Number
49
PB15
Pin Number
54
PE3
Pin Number
2
VDD_1
Pin Number
11
PA10
Pin Number
69
VDD_4
Pin Number
75
VDD_2
Pin Number
28
PB5
Pin Number
91
PC1
Pin Number
16
PB12
Pin Number
51
PA9
Pin Number
68
PB13
Pin Number
52
PD14
Pin Number
61
PB1
Pin Number
36
PD12
Pin Number
59
PE14
Pin Number
45
PC6
Pin Number
63
VSSA
Pin Number
19
NRST
Pin Number
14
PC11
Pin Number
79
VSS_5
Pin Number
99
PB0
Pin Number
35
PE0
Pin Number
97
PE6
Pin Number
5
PB7
Pin Number
93
PC0
Pin Number
15
PD8
Pin Number
55
PC15-OSC32_OUT
Pin Number
9
PC10
Pin Number
78
PE7
Pin Number
38
PE2
Pin Number
1
PD10
Pin Number
57
PA4
Pin Number
29
VBAT
Pin Number
6
PC5
Pin Number
34
PC2
Pin Number
17
PA8
Pin Number
67
Part Datasheet Audit
Scope
Reviewed the published Flux part STM32H563VGT6 against the official STMicroelectronics family datasheet and product page, covering project metadata, ordering code, symbol terminals, footprint geometry, and terminal properties.
Authoritative sources
The existing Datasheet URL is an official ST URL and covers STM32H562xx/STM32H563xx, despite the filename containing stm32h562ag. It was already populated, so it was not changed.
Available part information

Table


FieldCurrent valueDatasheet/product resultStatus
Manufacturer part numberSTM32H563VGT6STM32H563VGT6Match
ManufacturerSTMicroelectronicsSTMicroelectronicsMatch
Pin count100V ordering-code field = 100 pinsMatch
PackageFootprint is LQFP-100, 14 × 14 mm, 0.50 mm pitchT ordering-code field = LQFP; LQFP100 body 14 × 14 mm, 0.50 mm pitchMatch at package-family level
Temperature gradeNot explicitly stored6 = industrial, −40 to +85 °C, LDO optionMissing property
FlashDescription says 2 MbytesG = 1 MbyteMismatch
SRAMDescription says 640 Kbytes640 KbytesMatch
CPUDescription says Cortex-M33, 250 MHz, TrustZone/FPU, 375 DMIPSFamily/product data agreesMatch
Part typeIntegrated Circuits; library subtype shown as Logic/ANDMicrocontrollerMismatch / misclassification
Package propertyNo explicit Package or Case Code property foundLQFP100, 14 × 14 mmMissing property
Ordering-code decode
STM32 H 563 V G T 6
  • STM32: Arm-based STM32 MCU
  • H: high-performance family
  • 563: STM32H563 device
  • V: 100 pins
  • G: 1 Mbyte Flash
  • T: LQFP package
  • 6: industrial −40 to +85 °C, LDO option
Key specifications
  • Arm Cortex-M33 core with TrustZone, DSP and FPU
  • Maximum CPU frequency: 250 MHz
  • Performance: up to 375 DMIPS
  • Embedded Flash: 1 Mbyte for STM32H563VGT6
  • SRAM: 640 Kbytes
  • Main supply range: VDD 1.71 to 3.6 V
  • Package: LQFP100, 14 × 14 mm body, 0.50 mm lead pitch
  • Temperature grade: −40 to +85 °C
  • Security features include TrustZone and hardware security/cryptographic functions in the STM32H563 family
  • Mixed-signal and connectivity resources include ADC/DAC, timers, USB FS, FDCAN, USART/UART, SPI, I²C and audio/serial interfaces; exact muxing is pin-dependent
Schematic symbol audit
Pin-number and primary-name mapping
The symbol contains exactly 100 terminals with unique pin numbers 1–100. The terminal names and numbers match the official LQFP100 LDO-option pinout for the exact non-Q ordering code, including:
  • Pins 1–6: PE2, PE3, PE4, PE5, PE6, VBAT
  • Pins 7–14: PC13, PC14-OSC32_IN, PC15-OSC32_OUT, VSS, VDD, PH0-OSC_IN, PH1-OSC_OUT, NRST
  • Analog/reference region: VSSA pin 19, VREF− pin 20, VREF+ pin 21, VDDA pin 22
  • Core regulator pins: VCAP at pins 48 and 98
  • USB supply: VDDUSB pin 73
  • Debug/boot pins: PA13 pin 72, PA14 pin 76, PA15 pin 77, BOOT0 pin 94
  • Final supply pins: VSS pin 99 and VDD pin 100
No missing, duplicated, or swapped primary pin names were identified in the 100-pin symbol.
Terminal metadata
Every terminal currently has:
  • Pin Type: Unspecified
  • No Pin Description
This is a significant quality gap. GPIOs should be classified as bidirectional/digital or programmable as appropriate; supply pins should be Power In or Ground; NRST/BOOT0 and oscillator/reference pins need appropriate electrical types. Pin descriptions should document supply function, reset/boot behavior, oscillator role, analog reference role, and GPIO alternate-function capability. Alternate functions do not need to be placed in the visible terminal name, but useful descriptions should be present.
Footprint audit
Correct items
  • 100 pads
  • 0.50 mm pitch
  • 14 × 14 mm package body outline
  • 16 × 16 mm nominal lead-tip envelope represented by the package geometry
  • Pad width: 0.30 mm, matching ST's footprint example
  • Pin-1 marker and counter-clockwise numbering arrangement appear consistent with an LQFP top view
Land-pattern mismatch
ST's datasheet footprint example indicates approximately:
  • Land width: 0.30 mm
  • Land length: 1.20 mm
  • Outer land-pattern span: 16.7 × 16.7 mm
  • Inner span: 14.3 mm
The current footprint uses 0.30 × 1.475 mm pads centered 7.738 mm from the origin. This produces approximately:
  • Outer copper span: 16.951 mm
  • Inner copper span: 14.001 mm
Therefore the pads are about 0.275 mm longer than the ST example and extend both farther inward and outward. The footprint may still be solderable, but it does not match the manufacturer's illustrated land pattern and reduces toe-to-courtyard margin. This should be reviewed against the intended IPC density level or replaced with the ST recommended dimensions.
The footprint filename QFP50P1600X1600X160-100N correctly encodes 0.50 mm pitch, 16 × 16 mm overall package span, 1.60 mm max height, and 100 leads.
  1. Critical metadata: Change the description from 2-Mbyte Flash to 1-Mbyte Flash for the G memory-density code.
  2. Classification: Change Part Type from generic Integrated Circuits / Logic to Microcontroller and remove the erroneous Logic Function = AND classification.
  3. Terminal quality: Add datasheet-derived Pin Description values and meaningful Pin Type classifications for all 100 terminals.
  4. Package metadata: Add Package or Case Code: LQFP100 (14 × 14 mm, 0.50 mm pitch) and operating-temperature metadata.
  5. Footprint: Review the 1.475 mm land length versus ST's 1.20 mm footprint example; current pads are longer by 0.275 mm.
  6. Datasheet URL: No action required. The existing URL is official and applicable to the exact device family.
Overall assessment
The primary 100-pin symbol mapping is correct for STM32H563VGT6's LQFP100 LDO configuration. The main risks are incorrect Flash metadata, incorrect IC classification, absent terminal descriptions/types, and a footprint land length that differs materially from ST's example.
  • Scope

  • Authoritative sources

  • Available part information

  • Ordering-code decode

  • Key specifications

  • Schematic symbol audit

  • Pin-number and primary-name mapping

  • Terminal metadata

  • Footprint audit

  • Correct items

  • Land-pattern mismatch

  • Mismatches and recommended corrections

  • Overall assessment