Part Datasheet Review

flux

I’ll organize the 57 terminals into functional sections—FIFO data/control, USB 2.0, USB 3.0 TX/RX, clock, GPIO, and power/ground—with consistent orientations and logical terminal ordering. Editing and verifying the part symbol requires Agent mode.
Continue in Agent Mode

flux

I’ll reorganize all 57 terminals into datasheet-aligned functional sections and groups, apply consistent orientations and ordering, then verify the rendered symbol and pin coverage.
Thought for 12 mins 41 sec
Created 3 tasks.
1/3 Inspect current terminal metadata and datasheet pin functions

Inspect current terminal metadata and datasheet pin functions

Apply sections, pin groups, orientations, and terminal order to all terminals

Verify all 57 pins and rendered symbol organization

Thought for 14 sec
Thought for 6 sec
Awaiting 1 background task
"FT600Q-B-T Symbol Organization" completed.

flux

The symbol organization is applied. I’m now checking the final pin metadata and rendered layout to confirm all 57 terminals are present, ordered, and grouped without regressions.

flux

Organized and verified all 57 terminals in one composite parametric symbol:
  • Sections: FIFO, control/GPIO, USB 2.0, USB 3.0, clock, power, and ground
  • Bus bits and differential pairs are adjacent and numerically ordered
  • Power pins are on top; grounds and exposed pad are on bottom
  • All terminals have a pin group, orientation, and unique group-relative order
  • Pin names, numbers, and physical pin count remain unchanged
Open item: electrical pin types remain Unspecified, outside this organization-only change.
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Files

Pins

Symbol

Layout

3D View

BE_0
Pin Number
2
TXE_N
Pin Number
4
BE_1
Pin Number
3
AVDD
Pin Number
1
Name
Pin #
Type
Section
Pin Group
Orientation
Order
Sub-symbol
AVDD
1
Unspecified
Power
Analog Power
Top
10
BE_0
2
Unspecified
FIFO Interface
FIFO Byte Enables
Right
20
BE_1
3
Unspecified
FIFO Interface
FIFO Byte Enables
Right
20
TXE_N
4
Unspecified
FIFO Interface
FIFO Status
Right
20
RXF_N
5
Unspecified
FIFO Interface
FIFO Status
Right
20
SIWU_N
6
Unspecified
FIFO Interface
FIFO Control
Left
20
WR_N
7
Unspecified
FIFO Interface
FIFO Control
Left
20
RD_N
8
Unspecified
FIFO Interface
FIFO Control
Left
20
OE_N
9
Unspecified
FIFO Interface
FIFO Control
Left
20
RESET_N
10
Unspecified
Control and GPIO
Device Control
Left
30
WAKEUP_N
11
Unspecified
Control and GPIO
Device Control
Left
30
GPIO0
12
Unspecified
Control and GPIO
GPIO
Right
30
GPIO1
13
Unspecified
Control and GPIO
GPIO
Right
30
RESERVED
14
Unspecified
Control and GPIO
Reserved
Left
30
VCC33_1
15
Unspecified
Power
3.3V Power
Top
10
XI
16
Unspecified
Clock
Reference Clock
Left
50
XO
17
Unspecified
Clock
Reference Clock
Right
50
DP
18
Unspecified
USB 2.0
USB2 Data
Right
60
VCC33_2
19
Unspecified
Power
3.3V Power
Top
10
DM
20
Unspecified
USB 2.0
USB2 Data
Right
60
RREF
21
Unspecified
USB 3.0
USB3 Reference
Left
40
VDDA
22
Unspecified
Power
Analog Power
Top
10
VD10_1
23
Unspecified
Power
Core Power
Top
10

FT600Q-B-T