EG25-G LGA Footprint Verification

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unitech2

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Read-only verification for parent MT7981 Router. Current library part EG25GGB-MINIPCIE claims MiniPCIe MPN but has144 terminals and attached Quectel EG25-G Hardware DesignV1.5 PDF (LGA). Determine whether its actual complete pin map and footprint are EG25-G LGA. Inspect EVERY144 pin/pad and compare physical footprint to manufacturer top-view/bottom-view pin assignment and recommended LGA land pattern. Also verify RF main/diversity/GNSS pins, grounds, VBAT and USB/SIM/control. Do NOT mutate this library part or router. Return precise evidence, footprint/pin defects and whether board-level MPN/name override would safely use it as actual soldered EG25-G LGA. Report uncertainty rather than assume.

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I’ll compare all 144 terminals and pad geometries against the EG25-G LGA documentation, with no changes to either project.

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Inspected all 144 terminals and pads: this is an EG25-G LGA-style part mislabeled as Mini PCIe, but an MPN/name override alone is not safe—pins 73–84 contain active copper/paste/mask lands where Quectel requires omission and a keepout. RF, VBAT, USB, SIM and control numbering matches the LGA documentation; exact manufacturer drawing-to-footprint orientation and coordinate verification remains open, and neither project was modified.
Full pin map, geometry, defects and evidence
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Files

Pins

Symbol

Layout

3D View

Name
Pin #
Type
Section
Pin Group
Orientation
Order
Sub-symbol
Pin Description
WAKEUP_IN
1
Input
Control
Control
Left
2
Sleep mode control / wake input, active low, 1.8 V domain; do not pull up before startup
AP_READY
2
Input
Control
Control
Left
2
Application processor ready input, 1.8 V domain
RESERVED
3
Reserved
Reserved
Reserved
Left
9
Reserved pin; keep unconnected per datasheet
W_DISABLE#
4
Input
Control
Control
Left
2
Airplane mode control, active low, 1.8 V domain; pulled up by default
NET_MODE
5
Output
Status
Status
Right
2
Network registration mode indication, 1.8 V domain; do not pull up before startup
NET_STATUS
6
Output
Status
Status
Right
2
Network activity status indication, 1.8 V domain
VDD_EXT
7
Power
Power
Power
Top
1
1.8 V output for external pull-up circuits, max 50 mA; leave open if unused
GND
8
Ground
Ground
Ground
Bottom
10
Module ground pin
GND
9
Unspecified
Ground
Ground
Bottom
10
USIM_GND
10
Ground
SIM
SIM
Right
4
Specified ground for USIM card interface
DBG_RXD
11
Input
UART
UART
Left
5
Debug UART receive, 1.8 V domain
DBG_TXD
12
Output
UART
UART
Left
5
Debug UART transmit, 1.8 V domain
USIM_PRESENCE
13
Input
SIM
SIM
Right
4
USIM card hot-plug detect, 1.8 V domain
USIM_VDD
14
Power
SIM
SIM
Right
4
USIM card power output, automatic 1.8 V or 3.0 V, max 50 mA
USIM_DATA
15
Bidirectional
SIM
SIM
Right
4
USIM card data
USIM_CLK
16
Output
SIM
SIM
Right
4
USIM card clock
USIM_RST
17
Output
SIM
SIM
Right
4
USIM card reset
RESERVED
18
Reserved
Reserved
Reserved
Left
9
Reserved pin; keep unconnected per datasheet
GND
19
Ground
Ground
Ground
Bottom
10
Module ground pin
RESET_N
20
Input
Control
Control
Left
2
Module reset input, active low, 1.8 V domain; leave open if unused
PWRKEY
21
Input
Control
Control
Left
2
Turn on/off the module; output voltage about 0.8 V due to internal diode drop
GND
22
Ground
Ground
Ground
Bottom
10
Module ground pin
SD_INS_DET
23
Input
SDIO
SDIO
Right
6
SD card insertion detect, 1.8 V domain; required if SD card is used

EG25GGB-MINIPCIE