Reviewed the 2N4416 part against the official InterFET datasheet. The Datasheet URL was already set, so I did not change it.
Key specs confirmed
- MPN: 2N4416
- Manufacturer: InterFET
- Function: N-channel JFET, low capacitance / low leakage, for mixers and VHF amplifiers
- Package: TO-72, 4 leads including case
- Max reverse gate-source / gate-drain voltage: −30 V
- Gate leakage: 10 pA typical, 0.1 nA max @ 25°C
- IDSS: 5–15 mA
- Ciss: 4 pF
- Coss: 2 pF
- Crss: 0.8 pF
- Power dissipation: 300 mW
- Junction temperature: −55°C to +125°C
Datasheet TO-72 pinout
- Pin 1: Drain
- Pin 2: Source
- Pin 3: Gate
- Pin 4: Case
Mismatches / issues flagged
- The schematic terminals have only pin numbers; pin names/descriptions are missing for Drain, Source, Gate, and Case.
- Pin electrical types are all Unspecified; they should be set appropriately, e.g. Gate/Drain/Source as signal/passive-style transistor terminals and Case as case/shield/mechanical.
- The footprint is named/derived from “2N4222A.kicad_mod”, not 2N4416. It appears to be a compatible TO-72-style pattern, but the source/name is misleading.
- Footprint geometry mostly matches the datasheet’s TO-72 spacing: 2.54 mm / 1.27 mm pitch, 0.8 mm drills.
- Datasheet suggested pad diameter is 1.40 mm; footprint pads are 1.2 mm for pin 1 and 1.3 mm for pins 2–4, slightly smaller than the datasheet recommendation.
- Project/package metadata does not explicitly state TO-72 as a package property, even though the footprint is TO-72.
Suggested next steps
- Update terminal names/descriptions to match the datasheet pinout.
- Set useful pin electrical types.
- Rename or replace the footprint asset so it clearly identifies 2N4416 / TO-72.
- Consider increasing through-hole pad diameters to the datasheet-recommended 1.40 mm.