Neo Geo USB Arcade Stick


Substantial mechanical and electrical design work is complete.
Completed
  • 470 × 280 × 90 mm wooden enclosure with brushed-metal 8-button deck.
  • Hinged quick-access control deck with positive stay and reusable hardware.
  • Removable bottom, universal adjustable lever adapter, harness lanes, USB strain relief, and removable electronics tray.
  • 134 active mechanical model bodies with successful internal/external renders.
  • RP2040 controller schematic with USB-C, ESD/VBUS protection, flash, clock, 3.3 V regulation, boot/reset controls, test access, and modular JST harness connectors.
  • 54 electronic components and 43 nets.
  • Controller PCB constrained to the removable 120 × 55 mm board envelope.
  • Documentation:
  • Safe BOM and STPZ exports were produced.
Still open
  • The last confirmed routing result had 9 airwires, mainly around the USB-C differential escape. A final USB-C breakout recovery pass was started, but I could not retrieve its completed report.
  • Gerbers and pick-and-place files remain withheld until a live check confirms zero airwires and no blocking DRC faults.
  • Exact Sanwa JLF/JLX and Seimitsu cross-compatibility remains provisional because complete manufacturer mounting drawings were unavailable.
  • Button-nut clearance, deck motion, structural strength, cable pull resistance, and swap time require a physical prototype.
  • PC and supported Switch-class operation targets GP2040-CE. Native PS5 and Xbox One authentication still requires licensed hardware or an external compatible adapter.
Execution stopped because your ACUs ran out.

Waiting for input


Firmware Starter
Firmware Strategy
Use upstream GP2040-CE rather than reimplementing a USB gamepad stack. Create a custom RP2040 board configuration matching this PCB, build with the toolchain documented by the selected GP2040-CE release, and flash through BOOTSEL USB recovery.
GPIO Map

Table


GP2040-CE actionGPIO
D-pad Up0
D-pad Down1
D-pad Left2
D-pad Right3
B14
B25
B36
B47
B58
B69
B710
B811
Start12
Select/Back13
Home/Guide14
Mode15
All control inputs are active low. Enable internal pull-ups and debounce in firmware. Do not assign GPIO16–GPIO29 to user controls unless the hardware is revised; they are intentionally no-connects.
Hardware Resources
  • USB: RP2040 native USB D+/D−.
  • Flash: W25Q16 on RP2040 QSPI pins; BOOTSEL switch pulls QSPI CS low during reset/power-up.
  • Clock: 12 MHz crystal circuit.
  • Reset: RUN switch to GND.
  • Debug: J8 exposes 3V3, SWDIO, SWCLK and GND; test points duplicate SWDIO/SWCLK and RUN.
Build Path
  1. Clone the official GP2040-CE repository and check out a stable release compatible with RP2040.
  2. Install the repository's documented Pico SDK/CMake dependencies or supported container workflow.
  3. Copy an existing RP2040 board definition as a starting point.
  4. Replace only the board pin mapping with the GPIO table above; keep native USB and external QSPI support enabled.
  5. Configure the desired PC/Switch-compatible input modes in GP2040-CE.
  6. Build the UF2 image using the release's documented build command for the new board target.
  7. Hold BOOTSEL, tap RESET/RUN, release BOOTSEL, and copy the UF2 to the RP2040 mass-storage device.
  8. Verify every input in a host game-controller test page before enabling tournament or console profiles.
Compatibility Limits
PC operation and Nintendo Switch-class modes supported by GP2040-CE are the target. Native PS5 and Xbox One authentication require licensed or external authentication hardware and are not implemented on this PCB. Use a compatible external adapter where required.
Initial Firmware Test
Log each harness pin while shorting it to J2/J3/J4/J5 pin 1 GND. Confirm exactly one logical input changes and that no direction/button remains asserted when open.
  • Firmware Strategy

  • GPIO Map

  • Hardware Resources

  • Build Path

  • Compatibility Limits

  • Initial Firmware Test