BQ25185 Charger Topology

Verificación preliminar confirma que AIRTAG_CHG_SYS contiene sólo U3.SYS y C5.P1, y que CE está en AIRTAG_PACK_NEG/GND, no en SYS; ahora cierro reporte y ERC/lista de errores.
Detecté un error real: U4.V− estaba flotante; lo corrijo conectándolo al resistor R8 como red V− de BQ29700. Mantendré PS/SYNC de U8 como decisión abierta, no lo ataré arbitrariamente.
Corrección U4.V− aplicada; ejecuto la verificación final de Fase 1 y actualizaré el reporte del proyecto.
Fase 1 quedó ejecutada y detenida: construí el esquema sombra por bloques, sin crear PCB, placement físico, routing, antena ni conexiones a máquina/carga. Verifiqué que AIRTAG_CHG_SYS = U3.SYS + C5.1 solamente, y que U3.CE está a AIRTAG_PACK_NEG/GND, no a SYS.
Actualicé el reporte completo con BOM, conectividad, tabla pin-a-pin BQ25185, huecos de librería, ERC y decisiones abiertas: Shadow Build Report — Brand NewDay.
Quedan errores ERC intencionales/abiertos de Fase 1: U8 PS/SYNC sin política, AIRTAG_CELL_POS sin fuente/batería definida, RF abierto sin antena/matching, y redes LM5069 UVLO/OVLO/TIMER/PWRSET sin valores.
Fix ERC and gaps
Replace proxy parts
Review schematic only
Set PS/SYNC policy
Prepare Phase 2 plan
U3
U5
R24
Resistance
10kΩ
R15
Resistance
200kΩ
R23
Resistance
10kΩ
R3
Resistance
22.1kΩ
R18
Resistance
10kΩ
R8
Resistance
2.2kΩ
R20
Resistance
1kΩ
R16
Resistance
10kΩ
R9
Resistance
0.100Ω
R14
Resistance
1MΩ
R7
Resistance
21.5kΩ
R6
Resistance
24kΩ
R4
Resistance
47.5kΩ
R11
Resistance
42.2kΩ
R19
Resistance
1kΩ
R17
Resistance
10kΩ
R21
Resistance
1kΩ
R10
Resistance
100kΩ
R5
Resistance
1kΩ
R13
Resistance
31.6kΩ
R2
Resistance
5.1kΩ
R25
Resistance
10kΩ
R1
Resistance
5.1kΩ
R22
Resistance
10kΩ
R12
Resistance
100kΩ
K2
C18
Capacitance
100nF
D2
U2
Q4
C8
Capacitance
1uF
C5
Capacitance
10uF
C14
Capacitance
22uF
C9
Capacitance
1uF
C17
Capacitance
100nF
K1
C10
Capacitance
2.2uF
C6
Capacitance
1uF
K3
C16
Capacitance
100nF
C1
Capacitance
100nF
C13
Capacitance
10uF
Q5
C3
Capacitance
47pF
D3
C2
Capacitance
4.7uF
C19
Capacitance
100nF
C15
Capacitance
22uF
C12
Capacitance
22uF
C4
Capacitance
1uF
C11
Capacitance
2.2nF
C7
Capacitance
100nF
Q6
D1
Q2
L2
Inductance
2.2uH
L1
Inductance
68uH
J1
U1
U4
U8
Q3
U10
U6
U9
Q1
U7

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Project Specification — Brand NewDay Flux Shadow PCB
Project Overview
Clean-room shadow reconstruction in Flux for the Brand NewDay system. Status: BENCH_ONLY / NOT FOR FABRICATION / NOT FOR ENERGIZATION.
Intended Use
Architecture, schematic, and PCB-placement/routing capability evaluation only. This project must not be treated as a fabrication release, equipment authorization, RF/impedance certification, DFM approval, or permission to overwrite KiCad candidates.
Non-Negotiable Source Constraints
  • Authoritative input: Brand_NewDay_Flux_Shadow_PCB_Brief_v1.txt plus Brand_NewDay_Flux_Shadow_Agent_Instruction_v1.txt.
  • Do not import, modify, overwrite, or claim to reproduce KiCad N039/N040/N041.
  • Use exact MPN/value/reference-designator intent from the brief wherever available.
  • Maximum starting envelope: 170 mm × 140 mm, 4 layers.
  • Smaller board only after placement/clearance/thermal/relay/antenna/connector/service constraints are justified.
Main Features / Functional Blocks
  1. USB-C service input, USB ESD protection, CC resistors, CP2102N USB-UART bridge.
  2. BQ25185DLHR single-cell charger/power-path, BQ29700 protection, TPS63030 buck-boost.
  3. LM5069 + Q1 protected power entry, LM5164 5 V buck, TPS7A2033 3.3 V logic rail.
  4. CC1354P106 radio/controller, UART, SPI, reset, RF interfaces/keepouts.
  5. MCP41HV51 digital potentiometer.
  6. Three 5 V relay channels with MOSFET drivers, flyback diodes, gate resistors, and gate-bias resistors.
  7. Q2/Q3 experimental AirTag MOSFET paths: DNP / BENCH_ONLY only.
Critical BQ25185 Correction
Official BQ25185DLH/WSON-10 mapping required by the brief:

Table


PinFunctionRequired handling
U3.1SYSBelongs to SYS node only.
U3.2BATBattery-positive / cell-positive node per brief.
U3.3STAT2Status output; not SYS.
U3.4CEActive-low charge enable; must connect to GND for this shadow build. Never connect to SYS.
U3.5GNDGround / pack-negative side per brief.
U3.6TS/MRSupport network via R25 per brief.
U3.7ILIM/VSETProgramming network via R6 per brief.
U3.8ISETProgramming network via R7 and C3 per brief.
U3.9STAT1Status output; not SYS.
U3.10INAIRTAG_CHG_5V input.
U3.11Exposed padAIRTAG_PACK_NEG/GND.
C5 / SYS Capacitor Requirement
  • C5 = 10 µF, 25 V, 0805, SYS capacitor.
  • Connect C5 from SYS to GND close to U3.
  • Datasheet requirement recorded from brief: at least 10 µF ceramic nominal and at least 1 µF effective after DC-bias derating, from SYS to GND, close to SYS/GND pins.
  • Do not connect CE to C5/SYS.
Verified Connectivity Ledger From Brief
USB Service
  • USB_VBUS_RAW: J1 A4/A9/B4/B9.
  • USB_CC1: J1 A5 to U1.4; USB_CC2: J1 B5 to U1.5; R1/R2 are 5.1 kΩ Rd resistors.
  • USB_D_P: J1 A6/B6, U1.1, U2.4.
  • USB_D_N: J1 A7/B7, U1.2, U2.5.
  • DGND_SERVICE includes J1 shields/grounds, U1, U2, logic/power grounds, and U9 exposed pad.
  • USB_UART_TXD_MCU_RX: U2.26 to U9.11.
  • USB_UART_RXD_MCU_TX: U2.25 to U9.10.
BQ25185 / Battery / AirTag
  • AIRTAG_CHG_5V: U3.10 (IN).
  • AIRTAG_CELL_POS: U3.2 (BAT), U4.5, U8.5/U8.6/U8.8.
  • AIRTAG_CELL_NEG: U4.4 and battery-side support parts.
  • AIRTAG_PACK_NEG: U3.5, U3.11 exposed pad, U8 ground pins.
  • AIRTAG_3V0: U8.1 output.
  • AIRTAG_BUCK_L1: U8.4 to L2.1.
  • AIRTAG_BUCK_L2: U8.2 to L2.2.
  • AIRTAG_FB: U8.10.
  • BQ25185_ISET_PROG: U3.8.
  • BQ25185_TS_MR: U3.6.
  • BQ25185_VSET_PROG: U3.7.
Power Input / 5 V
  • VIN_RAW: U6.2.
  • VIN_SENSE: U6.1.
  • VIN_PROTECTED: U6.9 to U7.2.
  • MACHINE_POWER_GOOD: U6.8, U7.3, U7.6.
  • LM5069 control: U6.3 UVLO, U6.4 OVLO, U6.6 TIMER, U6.7 PWRSET, U6.10 Q_HS1_GATE.
  • LM5164: U7.4 RON, U7.5 FB, U7.7 BST, U7.8 SW.
  • RX_5V: K1.5, K2.5, K3.5, U5.1/U5.3.
CC1354 / Digital
  • RX_3V3: U2.6/U2.7, U5.5, U9.13/U9.22/U9.34/U9.44, U10.1.
  • MCP_SPI_SCK: U9.12 to U10.2.
  • MCP_SPI_CS_N: U9.14 to U10.3.
  • MCP_SPI_MOSI: U9.15 to U10.4.
  • MCP_SPI_MISO: U9.16 to U10.5.
  • MCP_SHDN_SAFE_N: U10.7.
  • CC1354_RESET_N: U9.35.
  • CC1354_DCOUPL: U9.23.
  • CC1354_VDDR: U9.45/U9.48.
  • RF915_N/P: U9.4/U9.3.
  • RF_PA20_N/P: U9.6/U9.5.
Relay Channels
  • RELAY_K1_DRIVE: U9.26; RELAY_K1_COIL_NEG: K1.4; RX_5V: K1.5.
  • RELAY_K2_DRIVE: U9.27; RELAY_K2_COIL_NEG: K2.4; RX_5V: K2.5.
  • RELAY_K3_DRIVE: U9.28; RELAY_K3_COIL_NEG: K3.4; RX_5V: K3.5.
  • Relay contact pins K1/K2/K3 pads 1/2/3 intentionally unresolved external contacts; do not invent machine/load wiring.
Layout Requirements
  • 4 layers; do not claim controlled impedance without manufacturer stack-up.
  • USB-C, ESD, CC resistors, CP2102N as one service cluster.
  • BQ25185/C4/C5/C6/programming network compact; minimize SYS/GND loop.
  • LM5164/L1/C10/C11/C12 compact and isolated from RF/USB.
  • RF/antenna interfaces and keepout reserved; do not invent antenna geometry.
  • Relays/flyback/MOSFET drivers/high-current paths away from RF/control paths.
  • Ordinary through vias only; no microvias/HDI.
  • Do not relax DRC or rules to hide errors.
Open Decisions / Data Not To Assume
  • Battery chemistry, capacity, protection arrangement, max charge voltage, allowed charge current.
  • USB role/current contract beyond basic USB-C sink Rd intent, connector/ESD requirements.
  • High-voltage input range and load current for LM5069/LM5164 path.
  • Machine/load wiring for relay contacts.
  • RF band, antenna part/geometry, matching network, keepout, compliance target.
  • Final manufacturer stack-up, copper weight, dielectric data, impedance requirements, creepage/clearance, DFM capability.
  • Environmental, thermal, enclosure, mounting, connector access, and test-point requirements.
Acceptance Criteria
  • Distinguish verified facts from assumptions.
  • U3.4/CE separate from SYS and tied to GND for this shadow build.
  • Q2/Q3 preserved as DNP/BENCH_ONLY.
  • Relay contacts pins 1/2/3 not connected to real load/machine nets.
  • Return missing inputs before claiming complete/fabricable design.
  • Final status: BENCH_ONLY / NOT FOR FABRICATION / NOT FOR ENERGIZATION.
Change Notes
  • Created from attached v1 brief and agent instruction on 2026-07-27.
  • Project Overview

  • Intended Use

  • Non-Negotiable Source Constraints

  • Main Features / Functional Blocks

  • Critical BQ25185 Correction

  • C5 / SYS Capacitor Requirement

  • Verified Connectivity Ledger From Brief

  • USB Service

  • BQ25185 / Battery / AirTag

  • Power Input / 5 V

  • CC1354 / Digital

  • Relay Channels

  • Layout Requirements

  • Open Decisions / Data Not To Assume

  • Acceptance Criteria

  • Change Notes

Brand NewDay Shadow PCB thumbnail
Clean-room BENCH_ONLY shadow schematic and 4-layer PCB proposal for Brand NewDay; not for fabrication or energization.

Properties

Properties describe core aspects of the project.

Pricing & Availability

Distributor

Qty 1

Arrow

$16.13–$22.74

Digi-Key

$1.42

HQonline

$1.99–$2.05

LCSC

$16.36

Mouser

$44.75

TME

$5.37

Verical

$9.04–$14.22

Controls