Finding Milk-V Duo S Part

flux

Work done
  • Removed P3 and replaced it with two new 1 x 26, 1.27 mm header placeholders: J13 and J14
  • Placed J13 and J14 parallel in the layout with 22.86 mm center-to-center spacing
  • Re-mapped required signals onto the new headers:
    • 5V_MAIN -> J13 pin 1
    • GND -> J13 pin 3
    • J1 pin 3 / USB_SRC_DP -> J13 pin 10
    • J1 pin 11 / USB_SRC_DM -> J13 pin 11
    • J3 to J10 PWM signals -> J14 pins 1 through 8
    • MAVLink RX from J12 pin 4 -> J14 pin 16
  • Renamed the project to reflect the updated module placeholder target
Success criteria review
  • ✅ The original P3 placeholder was removed
  • ✅ Two new 26-pin headers were added and placed with 22.86 mm spacing
  • ✅ 5V_MAIN, GND, USB D+ and D-, and J3 through J10 mappings were connected to the new headers
  • ✅ The schematic and layout now reflect the new Milk-V Duo S header placeholder approach
  • ⚠️ The plan requested MAVLINK_FC on header 2 pins 15 and 16, but the project currently exposes only MAVLINK_FC_RX on J12 pin 4. I mapped that existing signal to J14 pin 16. There was no matching TX net present to place on pin 15 without inventing a new connection.
Next steps
  • The new header footprints are placed, but the PCB still has unrouted airwires for these newly connected nets. If you want, I can continue by preparing the remaining signal plan around J13 and J14 for manual routing.
semenetsvladyslav

semenetsvladyslav

can you route all my wires?

flux

Not directly from this chat session.
I can help prepare routing by inspecting the layout, checking airwires/DRC, and setting layout rules, but I don’t currently have a direct routing control tool exposed here to finish “route all wires” for you. The available guidance for project modification shows routing as part of the PCB layout workflow, with inspect -> setup -> annotate -> group -> ui-place -> route, and emphasizes using layout-oriented tools for that workflow
What I can do next:
  • inspect the current PCB and tell you what remains unrouted
  • set or tighten layout rules before routing
  • review DRC/airwires after you run Auto-Layout / Auto-Route
  • help optimize placement around J13 and J14 to make routing easier
If you want, I can do the most useful next step now: audit the remaining unrouted nets and placement issues.
Audit unrouted nets
Check DRC airwires
Tighten layout rules
Placement around J2
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Project Specification
Scope
Carrier-board power input and regulation subsystem for a 7 V to 16 V DC source. The design generates a 5 V / 5 A primary rail and a 3.3 V / 3 A secondary rail dedicated to a cellular modem.
Status
Review
Architecture
Diagram



  
    
  
  
    
  
















DC Input node_7V to node_16V
2 Pin Screw Terminal
Input TVS Protection
Input Bulk And HF Decoupling
Primary Buck node_5V node_5A
5V Rail
Secondary Buck 3.3V node_3A
3.3V Cellular Modem Rail
Functional Requirements
  • Accept 7 V to 16 V DC input from an external supply.
  • Provide a regulated 5 V rail capable of 5 A continuous load.
  • Provide a regulated 3.3 V rail capable of 3 A continuous load for the modem.
  • Include an input TVS clamp and input decoupling.
  • Include output bulk and high-frequency decoupling on both rails.
Default Design Choices
  • Input connector: 2-pin 5.08 mm screw terminal.
  • Primary regulator: 5 A synchronous buck.
  • Secondary regulator: 3 A synchronous buck from the 5 V rail.
  • Output-setting networks use datasheet-based feedback or fixed-output variants as applicable.
Design Summary
Status: Draft / Review / Approved
Manufacturing target: Prototype / EVT / DVT / PVT / Production
Software / firmware: repository link
Scope
Purpose
In scope
Out of scope
System context
Requirements
Functional
Electrical
Mechanical / environmental
Key constraints
Dependencies and risks
Dependencies
Key risks
Validation
Success criteria
Planned checks
Release-facing notes
Expected deliverables
Special release notes
Change notes / open questions
Changes in this revision
Open questions

    Scope

    Status

    Architecture

    Functional Requirements

    Default Design Choices

    Design Summary

    Scope

    System context

    Requirements

    Functional

    Electrical

    Mechanical / environmental

    Key constraints

    Dependencies and risks

    Validation

    Release-facing notes

    Change notes / open questions

Documents

    Project Specification

    Design Notes

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Milk-V Duo S Carrier

Milk-V Duo S Carrier thumbnail
Dual-rail carrier-board power supply with protected 7V to 16V DC input, 5V 5A primary buck rail, and 3.3V 3A modem buck rail.

Properties

Power

Input 7V-16V DC, outputs 5V at 5A and 3.3V at 3A

Protected DC input with screw terminal and SMBJ18A TVS, TPS56528 primary 5V buck, TPS62132 secondary 3.3V modem buck, bulk and HF decoupling on both rails

Pricing & Availability

Distributor

Qty 1

Arrow

$4.40–$5.64

Digi-Key

$9.26–$10.03

LCSC

$18.59

Mouser

$16.08

Verical

$9.82–$11.82

Controls