LoRa load cell manager
Compact LoRa-based load cell manager board. Hosts Heltec WiFi LoRa 32, HX711 ADC for strain gauges, dual VL53L1X ToF sensors, 3.3V/2.8V rails, user buttons/LEDs, and screw terminals for robust interfacing.... show moreHidden Red R2-D2
Design a Single sided PCB. U1 - The LM324N is a standard 14PDIL package Q1 - 2N4401TA Q2 - TIP29AG Resistors - Generic resistor - H_AXIAL-P10.16_D2.5 Pot - PT10LV10-201A2020 Capacitors - 120uF Electrolytic Capacitor Diodes - 1N4148-1 LED - LED THT Zener - 1N47733A J1&J2 - TerminalBlock-01x02P-5.00mm... show moreS0-fix-smart-via-not-descendant-of-net
3.6V-16V to 3.30V @ 4A TLVM13640 Reference design. ! EXPERIMENTAL ! Terminals: VIN: 3.6V - 16V VOUT: 3.3V @ 4A PGOOD with 10k pullup.... show moreStep-Down 3.6V-16V to 3.3V @ 4A
3.6V-16V to 3.30V @ 4A TLVM13640 Reference design. ! EXPERIMENTAL ! Terminals: VIN: 3.6V - 16V VOUT: 3.3V @ 4A PGOOD with 10k pullup.... show moreSram example part
Static random access memory. See https://en.wikipedia.org/wiki/Static_random-access_memory NOTE: stripped out custom initial contents and variable number of data and address bitsa TODO: need to rename terminals to something sensible... show more