IC 1.028GHz 1 44-VFQFN Exposed Pad #Timer #PLL #commonpartslibrary

IC 350MHz 1 44-VFQFN Exposed Pad #Timer #PLL #commonpartslibrary

IC 350MHz 1 44-VFQFN Exposed Pad #Timer #PLL #commonpartslibrary

IC 350MHz 1 44-VFQFN Exposed Pad Timer #PLL #commonpartslibrary

IC 1.028GHz 1 64-VFQFN Exposed Pad #Timer #PLL #commonpartslibrary

IC 1.028GHz 1 44-VFQFN Exposed Pad #Timer #PLL #commonpartslibrary

DIP-14 Clock Generators / Frequency Synthesizers / PLL ROHS #CommonPartsLibrary #IntegratedCircuit #Clock #PLL

Fractional N Synthesizer (RF) IC 6.1GHz 1 24-WFQFN Exposed Pad, CSP #Timer #PLL #commonpartslibrary

Clock Generator, Fanout Distribution IC 250MHz 1 28-SSOP (0.154", 3.90mm Width) #Timer #PLL #commonpartslibrary

Clock Generator, Fanout Distribution IC 160MHz 1 28-SSOP (0.154", 3.90mm Width) #Timer #PLL #commonpartslibrary

Clock/Frequency Synthesizer (RF), Phase Detector IC 400MHz 1 16-TSSOP (0.173", 4.40mm Width) #Timer #PLL #commonpartslibrary

3.3V / 5.0V 14 MHz to 190 MHz PLL Clock Multiplier, SOIC-8 oscillator clock multiplier PLL SOIC*3.9x4.9mm*P1.27mm*

3.3V / 5.0V 14 MHz to 200 MHz PLL Clock Multiplier, SOIC-8 oscillator clock multiplier PLL SOIC*3.9x4.9mm*P1.27mm*

Analog to Digital Converters - ADC Single-channel, 9-bit, 1.3-GSPS analog-to-digital converter (ADC) with JESD204C interface 144-FCBGA -40 to 85 ADC09xJ1300 is a family of quad, dual and single channel, 9-bit, 1.3GSPS analog-to-digital converters (ADC). Low power consumption, high sampling rate and 9-bit resolution makes the ADC09xJ1300 ideally suited for suited for a variety of multi-channel communications and test systems. Full-power input bandwidth (-3dB) of 6GHz enables direct RF sampling of L-band and S-band. A number of clocking features are included to relax system hardware requirements, such as an internal phase-locked loop (PLL) with integrated voltagecontrolled oscillator (VCO) to generate the sampling clock. Four clock outputs are provided to clock the logic and SerDes of the FPGA or ASIC. A timestamp input and output is provided for pulsed systems. JESD204C serialized interface decreases system size by reducing the amount of printed circuit board (PCB) routing. Interface modes support from 2 to 8 lanes (dual and quad channel devices) or 1 to 4 lanes (for the single channel device), with SerDes baud-rates up to 17.16Gbps, to allow the optimal configuration for each application. Features • ADC Core: – Resolution: 9 Bit – Maximum sampling rate: 1.3GSPS – Non-interleaved architecture – Internal dither reduces high-order harmonics • Performance specifications (–1dBFS): – SNR (100 MHz): 53.5dBFS – ENOB (100 MHz): 8.5 Bits – SFDR (100 MHz): 64dBc – Noise floor (–20dBFS): –143dBFS • Full-scale input voltage: 80 mVPP-DIFF • Full-power input bandwidth: 6GHz • JESD204C Serial data interface: – Support for 2 to 8 (Quad/Dual channel) or 1 to 4 (Single channel) total SerDes lanes – Maximum baud-rate: 17.16Gbps – 64B/66B and 8B/10B encoding modes – Subclass-1 support for deterministic latency – Compatible with JESD204B receivers • Optional internal sampling clock generation – Internal PLL and VCO (7.2–8.2GHz) • SYSREF Windowing eases synchronization • Four clock outputs simplify system clocking – Reference clocks for FPGA or adjacent ADC – Reference clock for SerDes transceivers • Timestamp input and output for pulsed systems • Power consumption (1GSPS): – Quad Channel: 450mW / channel – Dual channel: 625mW / channel – Single channel: 940mW • Power supplies: 1.1V, 1.9V #CommonPartsLibrary #IntegratedCircuit #ADC #HighSpeedADC #RFADC #JESD204C #13GSPS #9bitADC #DirectRFSampling #TexasInstruments #MixedSignal #DataAcquisition #JESD204

8-bit Flash MCU, 32MHz, 14KB Flash, 1KB RAM 256B EEPROM, UQFN-28 FLASH-Based 8-Bit CMOS Microcontroller Low Power CRC DSM ADC^2 CLC PLL 32MHz UQFN*1EP*4x4mm*P0.4mm*

8-bit Flash MCU, 32MHz, 7KB Flash, 512B RAM 256B EEPROM, SOIC-28 FLASH-Based 8-Bit CMOS Microcontroller Low Power CRC DSM ADC^2 CLC PLL 32MHz SOIC*7.5x17.9mm*P1.27mm*