SDR Receiver Design
Worked for 1 min 48 sec
I’m adding the available RTL-SDR-compatible foundation now: USB-C, RTL2832U, EEPROM, 3.3 V regulator, USB protection, SMA antenna connector, and the key support passives. The missing tuner/clock parts will stay documented as open items rather than using fake placeholders.
Worked
Built the RTL-SDR-compatible schematic foundation for the P25 receiver: USB-C, RTL2832U, EEPROM, AP2112 3.3 V power, USB protection/choke, SMA input, decoupling, and tuner-interface nets. I also created the project spec here: Project Specification. Latest check showed no open ERC warnings/errors, but I have to stop because your account has no available ACUs right now.
Open items:
- Rafael R820T2/R828D/R860 tuner IC is still missing from the Flux library.
- Exact 28.8 MHz RTL2832U clock part is also missing.
- This is not yet a working receiver until those two blocks are added.
Suggested next steps:
- Add/create the missing tuner and 28.8 MHz clock parts.
- Finish the RF front end and tuner wiring.
- Re-run schematic review.
- Move to 4-layer PCB layout with USB differential routing and 50 Ω RF routing.
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Project Specification — Compact P25 SDR Receiver
Project Overview
Status: Draft
Compact USB-C receive-only SDR intended to monitor legal, unencrypted P25 Phase 1/Phase 2 public-safety systems using PC/Android software such as Unitrunker and DSDPlus. The first hardware revision targets RTL-SDR compatibility so existing RTL-SDR drivers can recognize it.
Intended Use
- Used as a USB SDR receiver connected to a PC or Android host.
- Main workflow: tune/control channel with SDR/Unitrunker, decode unencrypted P25 voice with DSDPlus or similar software.
- Intended as a hobbyist prototype, not a certified emergency-services product.
- Must not be used to bypass encryption or monitor systems where reception is illegal.
What the Device Should Do
- Receive unencrypted P25 Phase 1/2 public-safety channels when paired with compatible software.
- Cover the main public-safety bands:
- VHF: 136–174 MHz
- UHF: 380–520 MHz
- 700/800 MHz trunking: 758–869 MHz
- Connect over USB-C using USB 2.0 data and 5 V bus power.
- Present itself as an RTL-SDR-compatible receiver if possible.
- Provide clean RF input, ESD protection, low-noise power, and a stable reference clock.
Main Features
- USB-C power and USB 2.0 data.
- RTL2832U USB SDR demodulator/ADC path.
- External EEPROM for USB descriptor/configuration support.
- SMA antenna input, 50 ohm RF path.
- Planned Rafael Micro R820T2/R828D/R860-class tuner for RTL-SDR compatibility.
- 28.8 MHz reference clock requirement for RTL2832U-class SDR operation.
- USB ESD protection and VBUS overcurrent protection.
System Architecture
Diagram
Hardware Subsystems
RF Front End
- SMA 50 ohm antenna input.
- Add RF ESD protection and matching near connector.
- Future revision should add switchable filters/notches for local interference and public-safety bands.
SDR Tuner
- Preferred direction: Rafael Micro R820T2/R828D/R860-class tuner.
- Required for standard RTL-SDR software compatibility with RTL2832U.
- Flux library currently lacks these tuner ICs, so final all-in-one RF tuner schematic is blocked until the part is added or created from a reliable datasheet.
USB SDR Interface
- RTL2832U selected because it is recognized by standard RTL-SDR drivers used by Unitrunker and DSDPlus workflows.
- Requires 28.8 MHz reference, USB D+/D-, I2C EEPROM, tuner I2C, analog I/Q or IF input, 3.3 V and 1.2 V rails.
Power
- USB-C VBUS input, 5 V nominal.
- USB-C CC1/CC2 5.1 k pull-downs for sink/device mode.
- Polyfuse on VBUS.
- 3.3 V LDO for RTL2832U I/O/analog and tuner rail.
- RTL2832U internal 3.3 V to 1.2 V switching regulator for core/analog rails with required inductor/caps.
Clocking
- RTL2832U requires 28.8 MHz reference.
- Better scanner performance needs low ppm drift; target is 1 ppm TCXO if available.
- Flux library currently lacks a suitable 28.8 MHz TCXO/crystal; a component request or custom component may be needed.
Interfaces and Connections
- USB-C receptacle: VBUS, GND, USB D+, USB D-, CC1, CC2, shield.
- SMA antenna input: RF_IN, RF_GND.
- RTL2832U tuner interface: I2C_SCLT, I2C_SDAT, AGC_IF, AGC_RF, differential ADC inputs.
- EEPROM interface: I2C_SCL, I2C_SDA.
- Optional debug/test pads: 3V3, 1V2, GND, USB D+/D-, I2C tuner bus, IF/IQ nodes.
Power and Runtime Expectations
- USB powered only for revision 1.
- No battery or charger in first revision.
- Expected current target: about 250–350 mA during receive, based on RTL-SDR-class receivers.
- Peak budget target: 500 mA maximum from USB 2.0 after enumeration.
Power Tree and Power Budget
Table
| Rail | Load | Typical | Peak / Design Allowance |
|---|---|---|---|
| USB 5V | 3.3V LDO input | ~250–350 mA equivalent | 500 mA limit target |
| 3.3V | RTL2832U 3.3V pins | ~7 mA datasheet typical | allow 25 mA |
| 3.3V | RTL2832U internal 1.2V switcher input | ~75 mA equivalent for 202 mA at 1.2V, 85% est. | allow 150 mA |
| 3.3V | R820T2/R828D-class tuner | TBD; typical SDR dongle total suggests ~150–250 mA | allow 300 mA |
| 3.3V | EEPROM / pullups / clock | <10 mA | 25 mA |
Preliminary design budget: size the 3.3 V rail for at least 500–600 mA. The AP2112K-3.3TRG1 600 mA LDO is a candidate, but thermal dissipation from USB 5 V to 3.3 V must be checked in layout with enough copper.
Manufacturing and Assembly Expectations
- Compact SMD design.
- 4-layer PCB strongly recommended for RF, USB, and low-noise power integrity:
- L1 signal/components
- L2 solid ground plane
- L3 power plane
- L4 signal
- RF path should be 50 ohm controlled impedance.
- USB D+/D- should be routed as a 90 ohm differential pair.
- Keep tuner/clock/RF traces short and shielded by continuous ground.
Firmware-Relevant Hardware Requirements
- Revision 1 has no onboard firmware CPU.
- Host software uses existing RTL-SDR drivers.
- USB EEPROM contents may need RTL-SDR-compatible IDs/configuration.
- Tuner control is handled by host driver through RTL2832U tuner I2C bridge.
Physical Design Expectations
- Smaller than HackRF if possible.
- Board target for first revision: USB dongle-style or small rectangular module.
- SMA should sit at a board edge.
- USB-C should sit at the opposite board edge.
- RF front end and clock should be isolated from USB/power noise.
Important Design Decisions
- Use RTL-SDR-compatible architecture rather than a custom AD936x/FPGA architecture because Unitrunker/DSDPlus compatibility is the main user requirement.
- Use USB-C connector while retaining USB 2.0 electrical signaling.
- Defer standalone SDS100-like features — screen, buttons, audio amp, speaker, battery, embedded decoder — to a later revision.
- Library issue: RTL2832U exists in Flux, but the key Rafael tuner and 28.8 MHz clock part are missing from the library.
Assumptions
- The user wants to monitor only legal and unencrypted systems.
- P25 decoding runs on a PC/Android host, not on the board.
- Initial revision does not include transmit capability.
- Initial revision does not include a display, speaker, controls, or battery.
Change Notes
- 2026-07-13: Project renamed and scoped to a compact RTL-SDR-compatible P25 SDR receiver for Unitrunker/DSDPlus use.
- 2026-07-13: RTL2832U selected as the USB SDR demodulator direction; tuner part availability remains the main blocker.
Project Overview
Intended Use
What the Device Should Do
Main Features
System Architecture
Hardware Subsystems
RF Front End
SDR Tuner
USB SDR Interface
Power
Clocking
Interfaces and Connections
Power and Runtime Expectations
Power Tree and Power Budget
Manufacturing and Assembly Expectations
Firmware-Relevant Hardware Requirements
Physical Design Expectations
Important Design Decisions
Assumptions
Change Notes
