Schematic Layout and Wiring


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2/2 Independently review the power block and resolve critical findings.

Add a reference-based i.MX8M Mini PMIC and supporting power circuitry.

Independently review the power block and resolve critical findings.

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"i.MX8MM Power Review" completed.
Created a project doc

PMIC implementation status

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PMIC implementation status Status
Power block added but NOT approved for fabrication or power-up. Execution stopped at account ACU limit before review fixes. PCB layout and schematic drawing were not changed. Supplier preference is Mouser/DigiKey equally, Arrow or comparable major suppliers acceptable; current manufacturing profile still lists LCSC.
Implemented (build report, not yet independently repaired)
  • U31 implemented with PCA9450CHNY library identity and manufacturer part number overridden to PCA9450AAHNY. This is NOT approval to buy a C variant. Resolve dedicated AA library part and audit physical mapping/BOM before release. NXP datasheet https://www.nxp.com/docs/en/data-sheet/PCA9450.pdf .
  • L100–L105 Murata DFE201612E-R47M 0.47 uH; C100–C121 support; R100–R105; Y100...
I added the PMIC circuit, six inductors, support capacitors, processor decoupling and power/reset connections. It is not ready for power-up or fabrication: review found an unreliable processor footprint/pin mapping, an unresolved PMIC library identity, incomplete DDR4 circuitry and an unverified upstream power budget; details are saved in PMIC implementation status.
Two decisions remain:
  • May I replace the relabelled PMIC library entry with a verified PCA9450AAHNY part? That is my recommendation for U31 and its supply/control connections.
  • Should I retain DDR4—my recommendation—and complete its memory bus, DRAM_ZN resistor, 2.5 V VPP supply and validated startup configuration, or change to LPDDR4?
Execution stopped because your account ran out of ACUs.

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Project Specification
Project Overview
Product: SatelFluxBoard1. Status: Draft, schematic capture in progress; not approved or manufacture-ready. Automotive portable communication device, −40 to +85 °C ambient. Functionality first; cost target deferred. Existing project name retained.
Intended Use
Vehicle communication and R&D/prototyping. Deployment voltage is a 24 V vehicle system for the specified pulse test. Automotive qualification/certification scope is not yet agreed.
What the Device Should Do
Run Linux; communicate over Ethernet, WLAN/Bluetooth, USB, RS232 and isolated Classical CAN. Provide 64 independent 1.8 V digital I/O. Start from ignition and shut Linux down before switching off when ignition is removed. Restart without toggling input supply.
Main Features
  • Preferred processor: NXP MIMX8MM6CVTKZAA i.MX8M Mini, PMIC and 4 GB DDR4 (32 Gbit).
  • 256 MB eMMC target for software, 4 kB EEPROM, SD boot, Ethernet network boot option.
  • RTC with onboard coin-cell backup; input voltage and input-current readback.
  • Four low-power RGB LEDs, on/off control without PWM.
  • Two internal I2C buses; GPIO expanders explicitly acceptable for all 64 independent user I/O.
  • Four USB 2.0 host ports on headers: one 500 mA with individual overcurrent protection; three self-powered-device connections, each drawing at most 10 mA from VBUS. The 10 mA figure is a load budget, not an agreed hard hardware clamp.
  • 1 Gbit/s Ethernet on a header; PHY and magnetics onboard.
  • Murata LBEE5PK2AE WLAN/Bluetooth module with external antenna PCB connector.
  • RS232 debug TD/RD; second RS232 TD/RD/CTS/RTS header.
  • Classical CAN (not CAN FD), galvanically isolated, 5 V isolated supply generated onboard; requested isolation 2.5 kV.
Mechanical System Architecture
Electronics first by explicit user direction. No enclosure or mechanical CAD now. Future board envelope 160 × 100 mm provisional; mounting, enclosure and connector locations undecided.
Electrical System Architecture
Functional path: vehicle input → reverse/inrush/UVOV protection → switched 5 V → PMIC and system rails → SoC, DDR4 and peripherals. Always-on ignition control initiates boot and shutdown. CAN isolation includes an onboard isolated 5 V converter. External GPIO use 1.8 V expanders; PHY and USB hub provide the required physical/network connections.
Hardware Subsystems
Capture blocks: input protection and sensing; always-on/ignition logic; 5 V converter; processor/PMIC/clocks/reset; DDR4; eMMC/SD/boot; USB; Ethernet; WLAN/BT; Classical CAN; RS232; RTC/EEPROM; status LEDs; GPIO expansion.
Interfaces and Connections
Headers for power/ignition, USB, Ethernet, serial, CAN and GPIO. Header pitch and final connector choices require electrical and mechanical review. GPIO provide 64 independent signals, not 64 simultaneous native SoC pins. CAN termination should only be fitted at a bus end. Ground and isolated ground must remain separate.
Power and Runtime Expectations
  • Operating window: 6.5–36 V, with immediate cutoff outside limits, non-latching and automatic normal startup on recovery.
  • Survive +50 V indefinitely; earlier 6–50 V wording is not the operating range.
  • Active startup inrush limitation. Indefinite reverse polarity protection with <0.1 mA reverse current; reverse test voltage not specified.
  • Ignition nominal threshold 3 V. Below: orderly Linux shutdown then off. Above: normal boot. Hysteresis/debounce require design validation.
  • Off-state input current <10 mA; input voltage for this test remains to be specified.
  • IEC 61000-4-5 surge protection required, test levels/coupling intentionally deferred. ISO 7637-2 pulse 2a for 24 V system required; severity/test setup unresolved.
  • Immediate UVOV cutoff does not imply orderly shutdown during supply faults. No hold-up energy requirement has been agreed.
Power Tree and Power Budget
Input protection → 5 V system converter → PMIC rails and peripheral rails. Always-on 3.3 V feeds ignition control; isolated CAN uses separate 5 V/ground. Size supply for 1.5× total maximum demand, including processor, 4 GB DDR4, all communication devices, LEDs and 530 mA total USB VBUS load. Detailed rail budget and converter validation remain open; preliminary estimates are not acceptance evidence.
Manufacturing and Assembly Expectations
LCSC preferred where suitable. Industrial temperature parts throughout; coin-cell chemistry, crystal ratings and temperature derating must be checked. No PCB layout, stackup or manufacturing export authorised yet. No compliance claims or production release.
Firmware-Relevant Hardware Requirements
Linux BSP/device tree must support chosen PMIC, DDR training, hub, Ethernet PHY, Murata wireless, SPI CAN, expanders and sensors. Network boot requires a locally booted loader such as U-Boot; exact selector implementation needs to support three user choices, not assume direct Ethernet ROM boot. Preserve recovery/debug access. Shutdown handshake must hold power until Linux is safe and then allow ignition restart.
Physical Design Expectations
160 × 100 mm is only a future starting envelope. Schematic approval precedes PCB work. RF antenna, CAN isolation spacing and Ethernet/USB signal integrity constraints must be recorded for later layout.
Important Design Decisions
  • Schematic first, no PCB work until user approval.
  • Expanders allowed for 64 independent 1.8 V GPIO.
  • Onboard Ethernet magnetics and isolated CAN power.
  • Three low-current USB ports are for self-powered devices, not bus-powered storage.
  • Exact memory capacity/interface changes require user approval; do not silently replace 256 MB eMMC.
Assumptions and Open Decisions
  • Exact 256 MB eMMC availability and software image fit are unresolved. Larger eMMC needs approval.
  • Discrete DDR4 needs a verified library/custom part; changing to DDR3L/LPDDR4 or a SoM is not approved.
  • CAN 2.5 kV AC/DC, duration and insulation class unspecified.
  • Surge severity, reverse test voltage, shutdown timeout, ignition max voltage, mountings and connector details remain open.
Change Notes
Source is the latest uploaded specification plus subsequent user clarifications in this conversation. Ignore the first pasted file and earlier revisions. Clarifications supersede conflicting lines: eMMC 256 MB, 1.8 V expanded GPIO, USB 500/10/10/10 mA, Classical CAN with onboard isolated 5 V, onboard Ethernet magnetics, 160 × 100 mm provisional. Surge levels deliberately deferred.
  • Project Overview

  • Intended Use

  • What the Device Should Do

  • Main Features

  • Mechanical System Architecture

  • Electrical System Architecture

  • Hardware Subsystems

  • Interfaces and Connections

  • Power and Runtime Expectations

  • Power Tree and Power Budget

  • Manufacturing and Assembly Expectations

  • Firmware-Relevant Hardware Requirements

  • Physical Design Expectations

  • Important Design Decisions

  • Assumptions and Open Decisions

  • Change Notes