This is a preliminary architecture study, not a completed amplifier design. Continuous 0–100 V sinusoidal drive at 10 kHz is required for the PiezoDrive SA050520. The amplifier and power supply are in scope; schematic and layout remain unbuilt pending a material architecture trade-off.

The manufacturer's SA-series webpage lists SA050520 small-signal capacitance of 1.8 µF ±20%, increasing with voltage and temperature. It states that full-range effective capacitance is approximately twice small-signal capacitance and that a temperature increase of approximately 50°C can double effective capacitance. These factors are not an exact large-signal impedance model for 100 Vpp at 10 kHz. The webpage also gives continuous operating temperature up to 85°C, beyond which damage may occur.

Do not confuse actuator resonance, small-signal amplifier bandwidth, and continuous full-amplitude power bandwidth. Mounted-stage resonance and capacitance at the intended drive must be characterized.

For V(t) = 50 + 50 sin(2πft), I_peak = 2πfCV_peak and I_RMS = I_peak/√2, assuming a purely capacitive load. The DC bias does not contribute ideal steady-state capacitive current but affects output headroom, protection, and energy storage.

Reactive power magnitude is calculated as Q = 2πfCV_AC,RMS², with V_AC,RMS = 35.36 V. It is not the real power dissipated by the piezo or the DC input power.

Maximum waveform slew rate is 2πfV_peak = 3.14 V/µs; the amplifier requires margin above this.

Provisional output capability target: approximately 20 A peak and 14 A RMS under continuous repetitive operation, with current and temperature protection. This is not sufficient proof of performance at all possible capacitance/temperature conditions: the operating envelope must be measured and limited.

For an ideal source/sink class-B stage with a capacitive sine-wave load, average output-stage loss is approximately:

P_stage = (V_H − V_L) × I_peak/π.

This follows by integrating (V_H − v)i over positive current and (v − V_L)(−i) over negative current. Over a full cycle the ideal capacitor absorbs zero average real power. Quiescent power, protection resistors, and nonideal losses must be added separately.

An illustrative +110 V / −10 V supply has a 120 V span; it is not a selected supply design and its output-swing adequacy is not yet qualified against a chosen IC.

These numbers explain why a compact ordinary high-voltage linear amplifier is not a sufficient default. A parallel or tracking-rail linear stage may be possible, but requires case-temperature and SOA analysis, substantial cooling, and a larger power supply. No final supply budget, efficiency, rail voltage, fuse, or connector sizing has been established.

The manufacturer webpage warns about heating at high frequency. Its thermal equation resembles the AC reactive-power magnitude; it must not be treated automatically as measured piezo heating or as an exact continuous-power limit. The reported 2.5% material dissipation factor is specified at 1 kHz and is not a verified loss factor for 100 Vpp at 10 kHz. Do not extrapolate it into a guaranteed thermal design.

Measure actuator temperature, large-signal impedance, phase, and current in its actual preloaded mounting. Use an interlock/temperature shutdown below the manufacturer's limit with engineering margin; determine the threshold and cooling requirement from testing. An efficient amplifier does not remove the piezo's internal losses.

The 0–100 V PD200 configuration has an RMS current limit of 1.20 A, below even the 4.00 A RMS nominal requirement. Its pulse option leaves the average-current limit unchanged, so the high pulse-current headline does not qualify it for this task.

Absolute maximum supply span is 200 V. Absolute maximum internal dissipation is 400 W, not a guaranteed continuous rating at the actual case temperature.

Maximum AC junction-to-case thermal resistance is 0.25°C/W; this rating applies when output current alternates between both output transistors faster than 60 Hz. At 216 W, junction rise above case is approximately 54°C using this maximum thermal resistance; this excludes mounting and heatsink thermal resistance. A single device cannot cover the illustrative 432–518 W fixed-rail output-stage losses because these exceed its absolute maximum dissipation before extra losses are included.

The part is internally compensated for gain of at least 3 and is not unity-gain stable. There is no internal current-limit circuit; external sensing and limiting are needed. Capacitive-load stability and a full repetitive SOA load-line assessment remain open; no complete PA52-based design is claimed.

Recommend evaluating a high-current energy-recovering switching amplifier for continuous operation. Its power path must absorb returned piezo energy rather than rely on a conventional boost regulator to sink current. The development must include output filtering, feedback-loop stability across changing capacitance, cycle-by-cycle current limits, bus overvoltage management, actuator discharge, and temperature interlocks.

For a scanning-probe microscope, switching ripple, EMI, and voltage-noise-induced motion may make a low-noise linear approach preferable despite its cooling and power costs. The user must choose which trade-off governs the next build phase. No switching frequency, filter, power module, or final amplifier IC has been selected.