PCB Design for RF Energy Harvesting IoT Node
Thought
Work done
- Normalized and verified U2 nets so power + SWD are on the correct named nets shared with the SWD header J2:
Success criteria review
- ❌ U2 still fails Missing Footprints DRC (so it cannot be reliably placed/routed on PCB until a footprint-backed library entry is used).
- ❌ Cannot place U2 at the board edge or create the 10 mm antenna keep-out via tools (placement/keep-out geometry are PCB-editor actions).
- ❌ Cannot route/convert all ratsnest lines into copper traces via tools; DRC still shows Airwires.
- ✅ Power and SWD nets for U2 and J2 are now correctly connected in the schematic netlist.
Next steps
- Replace U2 with a Flux library entry that includes a valid PCB footprint (castellated + integrated antenna). Once U2 has no footprint error, you can place it at the board edge and enforce the 10 mm keep-out.
- In PCB editor: place U2 at the edge (antenna outward), draw the 10 mm keep-out, pour bottom GND, and run Auto-Layout/routing to clear Airwires (then re-check DRC).
Flux stopped
