Antenna Design Specifications

flux

0:53

Analyzing the PCB layout.

Reading docs about How do selector-based PCB layout rules work in Flux, especially for assigning trace width and clearance by net name, tag, or property for RF, power, and GPIO nets?.

Considering selector rules.

Reading docs about Flux selector syntax examples for targeting PCB nets by name, tag, or property in selector-based layout rules, so I can define rules for RF, power, and GPIO nets..

Reading docs about Flux PCB selector examples for matching specific nets in selector-based layout rules, including net designator selectors or net name syntax for applying trace width and keep out to named nets..

This is the most relevant entry I found related to the topic:
To change the width of several nets:
  • Navigate to the PCB editor.
  • Select "Rules" on the top left panel and "Add Ruleset".
  • Select the new ruleset, and in the right-hand panel, name the ruleset via the designator at the top.
  • In the "Selector" tab, add the designators of the nets you want to modify the trace width.
    • As shown in the example above, you can select nets using the "#" operator. You can also rename nets by bringing up the context menu for objects in the object panel.
    • Check out Selector-Based Layout Rules to learn more about using selectors.
Source
And this related Flux entry says:
  • Create selector‑based rules targeting nets by name, tag, or property (more granular than fixed classes).
  • Tie rules to stackup (impedance targets) and set precedence so critical nets receive correct geometry.
Source
And for clearance:
Add a Keep Out rule directly to the net
Type fills(1.5mm) in the Keep Out rule textbox. This will make the Keep Out rule only apply to fills.
Pro tip: you can also type 0.5mm fills(1.5mm) in the Keep Out rule. That will set a Keep Out of 0.5mm for every other object, but a 1.5mm Keep Out for fills.
Source
Give example selectors
Target 4-layer board
Include spacing values
20h

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Design Notes
Antenna layout remediation
  • Enforced layout-level RF rules: keepOut = 10 mm, traceWidth = 3.4 mm, and preferredTraceWidths = 3.4 mm.
  • Shifted the existing bottom ground zone center to X = 75.0 mm. With the current rectangular zone width of 8.0 mm, this moves the left boundary to X = 15.0 mm.
  • Re-ran DRC-style checks after the boundary adjustment to verify no new airwire, floating-copper, overlapping-fill, overlapping-copper, or invalid-layer issues were introduced.
  • Added three SMT landing pads as TP1, TP2, and TP3 to serve as a practical pi matching network implementation. These are intentionally excluded from BOM and marked with RF tuning roles so they can be populated during prototype tuning.
  • Pi network intent: use one center pad as the future series element location and the two outer pads as shunt element landing points to RF ground, preserving measurement access from the SMA launch at J1.
Remaining blocker
  • The current toolset can adjust layout rules on existing nodes, but it still does not expose precise relative placement or arbitrary copper-trace geometry creation for an RF feed. The pi matching network now exists as three surrogate SMT pads, but the final inline RF feed routing between J1, the center pad, and the driven element still requires explicit copper placement/routing.
Dual-Band WiFi PCB Antenna 2-Layer Update
  • Layout stackup changed from Standard 4 Layer to Standard 2 Layer.
  • Board dimensions preserved at 160 mm x 100 mm.
  • Existing copper zone moved to Bottom layer to act as the dedicated reference plane.
  • SMA launch connector is J1.
Feedline Verification
Assumptions used for first-order impedance verification:
  • Substrate: FR-4
  • Target board thickness per requirement: 1.6 mm
  • Copper thickness: 35 um
  • Single-ended microstrip target: 50 ohms
  • No soldermask correction applied in the width estimate
Approximate microstrip widths calculated for 50 ohms:
  • If effective dielectric constant is approximated with er = 4.3, width is about 3.57 mm.
  • If effective dielectric constant is approximated with er = 4.8, width is about 3.32 mm.
  • For a 3.0 mm top-layer microstrip over 1.6 mm FR-4, the estimated impedance is about 48.77 ohms.
Engineering conclusion:
  • A practical 50 ohm trace target on 1.6 mm FR-4 is approximately 3.3 mm to 3.6 mm wide.
  • A 3.0 mm feedline is close but slightly low in impedance relative to 50 ohms.
  • Final launch continuity still depends on the actual copper geometry at J1, via stitching, pad transition, and exact dielectric stackup after the Standard 2 Layer template is baked.
RF Rule Updates Applied
  • Layout-level Keep Out is set to 10 mm to preserve the antenna region clearance target.
  • Layout-level Trace Width is set to 3.4 mm.
  • Layout-level Preferred Trace Widths is set to 3.4 mm.
  • Present layout content is still limited to J1, so these are currently acting as project-level RF constraints until the antenna copper and matching network geometry are added.
Current Antenna Implementation Status
  • Current DRC review shows no airwires, no floating copper, and no overlapping fills in the existing layout state.
  • No antenna copper geometry or pi matching network geometry is present yet in layout.
  • Ground cutoff update to the new X = 15.0 mm target still requires explicit local geometry or zone-boundary implementation in the layout.
Remaining RF Validation Limits
  • Gain and VSWR compliance at 2.4 GHz and 5.8 GHz cannot be proven from static layout data alone.
  • Full confirmation requires EM or VNA measurement of the fabricated antenna or an RF field solver using the exact geometry.
Pi Matching Network Tuning Plan
  • Recommended use of the new pad set:
    • TP2 as the inline series element site in the RF path.
    • TP1 and TP3 as optional shunt element sites to RF ground.
  • Keep the final copper interconnect between the three pads and the driven element as short and straight as possible, maintaining continuous reference to the bottom ground plane and avoiding any ground split beneath the feed path.
  • During prototype tuning, begin with DNI shunt sites and an inline 0 ohm or short copper link at the series site, then fit small-value RF capacitors or inductors as measured return loss indicates.
  • Validation targets after routing: no new DRC issues, preserved antenna keepout region, and easy coax measurement access from J1.

    Antenna layout remediation

    Remaining blocker

    Dual-Band WiFi PCB Antenna 2-Layer Update

    Feedline Verification

    RF Rule Updates Applied

    Current Antenna Implementation Status

    Remaining RF Validation Limits

    Pi Matching Network Tuning Plan

Documents

    Design Notes

    build-checklist

    rf-bring-up-test-checklist

Assets

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DUAL-BAND WiFi PCB ANTENNA - 2.4GHz + 5.8GHz

DUAL-BAND WiFi PCB ANTENNA - 2.4GHz + 5.8GHz thumbnail
SPECIFICATIONS: • Gain: 10dBi @ 2.4/5.8GHz • Impedance: 50Ω • VSWR: <1.5:1 • Connector: SMA Male • PCB: FR-4, 1.6mm • Type: Yagi-Uda • Polarization: Vertical

Properties

Properties describe core aspects of the project.

Pricing & Availability

Distributor

Qty 1

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$3.09

LCSC

$7.04

Mouser

$3.74

Verical

$3.09–$3.17

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