BoomPack Audio Project Overview

R

ryanf

Yes, please let's do it!

flux

I've made a plan, and started work on it.

Started implementing a plan

#Goal

- Delete all existing PCB traces/routing geometry for the BoomPack Dual ESP32 Audio Pod while preserving schematic connectivity, component placements, board dimensions (75x75mm), and a 4-layer stackup and then reroute the board from scratch.

#Implementation plan

1. Inspect existing PCB layout

1. Identify and locate all stale routing objects including traces, vias, smart-vias, copper fills, floating copper, and dangling traces.

2. Confirm that schematic connectivity, component placement, board outline, and stackup are intact.

2. Remove stale routing objects

1. Batch delete all traces, vias, and copper elements that are flagged as stale or inactive.

2. Ensure that only essential elements (component pads, board outline, schematic nets) are retained.

3. Verify cleanup

1. Run a DRC inspection to confirm removal of all dangling traces, floating copper, and redundant routing objects.

2. Confirm that airwires remain as expected because the board is unrouted post-deletion.

4. Reconfigure and plan routing

1. Set up routing widths and parameters for differing signal types, including power/GND, UART/I2S, and control signals.

2. Use phase-based autorouting: route power and ground first, then critical signal pairs (UART/I2S), followed by remaining controls and headers.

5. Final verification

1. Re-run DRC to ensure there are no overlapping copper areas, stray airwires, or remaining stale objects.

2. Iterate cleanup actions until the board meets manufacturing criteria.

#Success criteria

- All stale routing objects are completely removed and the board is free from dangling traces and floating copper as verified by DRC.

- The board remains at 75x75mm with a 4-layer stackup and maintained component placements and schematic connectivity.

- All nets are outcome-routed based on defined routing priorities with a clear and manufacturable layout.

Task unable to complete.

3:27

Thought for 16 sec — Considering tool usage
Looking up Flux PCB routing cleanup delete all traces vias fl....
Checking 4 design areas.
Getting a layout overview.
Completed 4 design checks — found 224 issues.
Reading layout details.
Editing layout rules.
Reading layout details.
Editing layout rules.
Checking 4 design areas.

flux

  • Set Smart Via's active to "false"
  • Set Smart Via's active to "false"
  • Set Smart Via's active to "false"

flux

Work done
  • Verified the board is still 75×75mm with a 4-layer stackup and component placements intact.
  • Confirmed stale routing geometry remains: 476 trace segments, 39 smart vias, 92 vias, and 1 fill.
  • Checked DRC status: airwire/dangling routing errors are still present, so the board is not yet clean or rerouted.
Success criteria review
  • ❌ Stale routing fully removed: not met.
  • ✅ Board size/stackup/placement preserved: met.
  • ❌ Board rerouted from scratch and manufacturable: not met.
Next steps
A bulk PCB rip-up/delete operation and autorouting pass are required next. The routing guidance specifically calls for deleting dangling/stale traces before autorouting, then verifying airwires/DRC afterward .
Delete stale routing
Define net classes
Check cleanup DRC
Review stackup usage
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Files

Schematic

Layout

3D View

Boost Replacement Notes
Summary
  • Replaced the original U_BOOST LT1302CS8-5 boost converter with U_BOOST FP6276XR-G1.
  • Removed the external Schottky diode D_BOOST because FP6276 is a synchronous boost converter with VO pins.
  • Replaced the original 4.7 uH / 2.3 A L_BOOST with FXL0630-2R2-M, a shielded 2.2 uH inductor rated 9.5 A. This is within the FP6276 datasheet recommended 1.5 uH to 4.7 uH inductor range.
  • Added feedback divider and snubber parts required by the FP6276 datasheet-style application circuit.
Selected replacement
  • U_BOOST: FP6276XR-G1, LCSC C114313, SOP-8 with exposed pad.
  • Reason: Higher current margin than MT3608 for the audio pod 5V rail. FP6276 datasheet content indicates 5V operation at around 2.1 A load and a 6 A switch current limit. MT3608 is a smaller SOT-23-6 4 A-switch boost option.
Updated boost circuit
  • VBAT_SW connects to U_BOOST:VIN, U_BOOST:EN, and L_BOOST:1.
  • BOOST_SW connects to U_BOOST:LX::1, U_BOOST:LX::2, L_BOOST:2, and R_BOOST_SNUB:P1.
  • 5V_BOOST connects to U_BOOST:VO::7, U_BOOST:VO::8, output capacitors, U_3V3:VIN, and MAX98357A VDD pins.
  • BOOST_FB connects to U_BOOST:FB, R_BOOST_FB_TOP:P2, and R_BOOST_FB_BOT:P1.
  • GND connects to U_BOOST:GND, U_BOOST:EP, R_BOOST_FB_BOT:P2, and C_BOOST_SNUB:P2.
  • BOOST_SNUB connects R_BOOST_SNUB:P2 to C_BOOST_SNUB:P1.
New/changed values
  • R_BOOST_FB_TOP: 73.2 kΩ, 1%, 0603.
  • R_BOOST_FB_BOT: 10 kΩ, 1%, 0603.
  • Feedback output setting: VOUT = 0.6 V × (1 + 73.2 kΩ / 10 kΩ) = 4.992 V.
  • R_BOOST_SNUB: 1.5 Ω, 5%, 0603.
  • C_BOOST_SNUB: 2.2 nF, 25 V, X7R, 0603.
  • Existing output capacitance preserved: C_BOOST_OUT 47 uF and C_5V_BULK 47 uF on 5V_BOOST, plus downstream local amplifier/LDO capacitors.
Load compatibility assessment
  • The 5V rail powers the MAX98357A amplifier VDD pins and the AMS1117-3.3 input.
  • FP6276 was selected because its documented 5V/2.1 A operating example provides more margin than MT3608 for the combined class-D audio amplifier and ESP32/LDO load.
  • The configured feedback target is 4.992 V, effectively preserving the previous 5V boost rail.
PCB layout update
  • Placed the new U_BOOST, L_BOOST, feedback divider, and snubber in the existing boost-converter area.
  • L_BOOST is placed close to the LX pins.
  • Feedback resistors are placed close to FB and away from the switching node.
  • Snubber is placed close to LX/GND.
  • Placement pass reports no component overlap, out-of-bounds, or boost-cluster spacing issues.
Current validation status
  • Schematic connectivity for the new boost stage is verified.
  • BOM shows U_BOOST FP6276XR-G1 available through LCSC and L_BOOST FXL0630-2R2-M available through LCSC/HQonline.
  • Current layout review still reports routing/copper issues from stale or missing physical traces around the replaced boost cluster: 12 airwire errors, 13 overlapping-copper errors, and 2 dangling-trace warnings.
  • These remaining PCB issues require trace cleanup and re-routing before fabrication. The required routing/trace-deletion action is not available in the current tool set, so this run cannot make the PCB DRC clean.

  • Summary

  • Selected replacement

  • Updated boost circuit

  • New/changed values

  • Load compatibility assessment

  • PCB layout update

  • Current validation status