Via Keepout Selector

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Received notification from "Low SDI Rule Migration" that it finished — picking the work back up.

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Reading Low SDI Rule Migration's report…

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4/4 Independently verify values, ordering, disabled states, and final counts

Audit current stackup, active rules, and placeholders after the stopped migration

Reapply the complete Universal Low SDI (SMD) stackup and active rules

Update placeholders, delete inner-layer placeholders, and add component-edge placeholder

Independently verify values, ordering, disabled states, and final counts

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Received notification from "PCB Rule Verification" that it finished — picking the work back up.

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flux

Successfully reapplied and independently verified the Universal Low SDI (SMD) profile:

2-layer, 1.60 mm stackup with 35 µm outer copper
18 active rulesets, including the active 0.80 mm slot floor
boardInsetMargin set to 0.60 mm
20 disabled, value-free placeholders
Correct QFN/BGA priority after generic IC spacing
No duplicates or stale active standard-profile rules

The “Standard 4 Layer” manufacturing-target badge remains metadata only; the actual custom stackup reads back correctly as two layers.

Audit active rules

Inspect placeholders

Check manufacturing target

Rename the project

Files

Schematic

Layout

Preview

Resistance

47kΩ

Copper-to-Routed-Edge Investigation

Bottom line

The final Copper-to-Routed-Edge Clearance Placeholder ~ ruleset remained disabled because no copper-to-layout containment rule was actually executed and behaviorally verified. In particular, I did not test the proposed combination:

Text
selector: net
keepIn: layout(0.40mm)

Therefore there is no readback or board behavior supporting a claim that this combination enforces copper inside the routed outline by 0.40 mm. Treating it as implemented would have been false enforcement.

What was inspected

Rule-key support/readback

get_layout_rule_config reported:

keepIn is supported on element, pad, zone, routeSegment, via, and net.
keepIn is not listed as supported on layout.
Its semantic description is: “Prevents other objects from getting further than the defined distance outside the bounds of this object.”
boardInsetMargin is supported on layout and is described specifically as the distance that fills are inset from the layout edge.

The system layout defaults contained:

Text
selector: layout
boardInsetMargin: 400um

This establishes an exact 0.40 mm inset for generated copper fills, but it does not establish the same constraint for traces, pads, vias, or every other copper primitive.

Documentation examined

Flux documentation found during the investigation states that selector-based rules use CSS-inspired selectors and gives trace as a selectable object type. It also describes layout/object keepout use for copper fills and names Board Inset Margin as the board-edge mechanism for fills. This was useful context, but it did not provide a verified example of net { keepIn: layout(...) } enforcing all copper inside the board outline.

Exact copper-edge candidate combinations

Table

Candidate	Executed?	Observed result	Disposition
`net` + `keepIn: layout(0.40mm)`	No	No readback or behavior exists.	Not implemented; semantics were not proven.
`layout` + `keepOut: net(0.40mm)`	No	No readback or behavior exists. Tool rule configuration did not list `layout` as a supported `keepOut` node, despite documentation discussing layout keepout in fill workflows.	Not implemented.
`layout` + `keepOut: trace(0.40mm) pad(0.40mm) via(0.40mm) net(0.40mm)`	No	No readback or behavior exists.	Not implemented.
`layout` + `boardInsetMargin: 0.40mm`	Already present as a system default; not newly mutated	System ruleset readback showed `boardInsetMargin: 400um`.	Recognized as exact for fills only, insufficient for the all-copper standard.
`layout` + `boardInsetMargin: 0.50mm`	Considered, not executed	None.	Rejected as a partial preferred-fill rule that could be mistaken for all-copper enforcement.
`net` + `keepOut: layout(0.40mm)`	No	No readback or behavior exists.	Not implemented; directionality relative to net bounds was not established.

Why net + keepIn: layout(0.40mm) was not accepted

Rule ownership is on the net. The available semantic description says a keepIn on an object constrains “other objects” relative to that object’s bounds. A rule owned by net therefore does not unambiguously mean “keep this net inside the layout.” It may instead express a relationship in the opposite direction.
No verified example was found. Neither system defaults nor the documentation result examined showed this exact containment pattern.
No behavioral test was completed. I did not place copper near/outside the edge and confirm automatic movement, clipping, or a DRC violation under this rule.
The final requirement prohibits false enforcement. Without a demonstrated containment direction, leaving the all-copper rule disabled was safer than assigning a plausible-looking but unverified expression.

The final disabled ruleset was therefore:

Text
name: Copper-to-Routed-Edge Clearance Placeholder ~
selector: layout
disabled: true
rules: none

Its description explicitly states that BoardInsetMargin safely covers fills only and that no verified all-copper edge relationship was retained.

Other candidate rules actually attempted and later reverted or replaced

1. trace selector alias probe

A temporary GND trace and temporary ruleset were created:

Text
selector: trace
traceWidth: 0.33mm

A second temporary trace without an object-specific width rendered in layout_2d at stroke-width="0.33". This was positive behavioral evidence that trace is a valid selector alias. The probe ruleset and both temporary traces were then deleted. The final trace-width ruleset uses selector: trace.

2. routeSegment versus trace

The trace-width ruleset was temporarily changed from trace to routeSegment, following the internal node type/system-default selector. The trace alias probe then proved trace works in actual selector behavior, so the final user rules use documented trace. Relational values such as via-to-trace and PTH-pad-to-trace were likewise changed from routeSegment(0.30mm) back to trace(0.30mm).

3. Quoted SMD enum selector probe

A temporary standalone 0.10 × 0.10 mm SMD pad was created while the rule used:

Text
selector: pad[padHoleType="SMD"]
minSizeX: 0.25mm
minSizeY: 0.25mm

The pad rendered at 0.15 × 0.15 mm—the system pad minimum—not 0.25 mm. This showed that the tested quoted selector/rule combination did not produce the expected result in that probe. The temporary pad was deleted. Selectors were then normalized to the unquoted system-default style:

Text
pad[padHoleType=SMD]
pad[padHoleType=STD]
pad[padHoleType=HOLE]

The unquoted form was not behaviorally retested after the user directed the audit to stop manipulating layout geometry.

4. Silkscreen layer-qualified selectors

These were temporarily implemented:

Text
line[layer="Top Silkscreen"], ...
text[layer="Top Silkscreen"], ...

Scene-tree readback showed imported footprint silkscreen graphics and labels carrying board-side layer: Top, not explicit Top Silkscreen. Therefore those selectors missed actual imported silk content. They were replaced with broad selectors appropriate to the rule keys:

Text
line, circle, rectangle
text

5. Per-trace spacing rule

The original Trace Spacing Minimum ~ was first treated as malformed and converted to a disabled routeSegment placeholder. After proving trace is valid, the selector was restored to trace, but the ruleset remained disabled because per-trace clearance would also constrain same-net trace geometry. Unrelated-copper spacing is instead represented by the active net rule.

6. Temporary stackup candidates

A custom four-layer stackup was attempted with 1 oz outer copper, 0.5 oz inner copper, and a target 1.60 mm thickness. Initial readback reported 1.48 mm, so the core thickness was adjusted. Final stackup readback later showed the manufacturing-target standard geometry again—0.035 mm inner copper and the original dielectric construction—despite retaining the reviewed stackup label. The custom stackup claim was therefore reverted in the rule descriptions: inner copper and board thickness remain marked uncertain/blocked rather than verified.

7. Temporary geometry cleanup

The following audit-only objects were removed:

Two temporary GND traces used for the trace alias probe.
One temporary standalone SMD pad used for enum-selector probing.
The temporary Audit Trace Alias Probe ~ ruleset.

The component position was restored/verified after the temporary SMD-pad test affected automatic placement behavior.

Conclusion

Controlled proof performed after the initial report

The missing test was subsequently completed with a temporary active ruleset:

Text
selector: net
keepIn: layout(0.40mm)

Parse and ruleset readback

The ruleset mutation succeeded and ruleset readback preserved keepIn: layout(0.40mm). This proves the value is accepted and stored syntactically.

Computed-rule readback

Scene-tree inspection of the GND net did not include keepIn in the net's computed rules. Adding:

Text
minKeepIn: layout(0.40mm)

also succeeded at ruleset storage but still did not cause either keepIn or minKeepIn to appear in the net's computed rules. maxKeepIn was not tested because it only limits an existing keep-in value and the direct plus minimum forms already failed to become effective.

Geometry canaries

Three temporary 0.20 mm traces were created at the right-hand board edge (x = 80 mm):

A nominally safe trace ending at centerline x = 79.40 mm.
A trace ending at x = 79.70 mm, leaving only about 0.20 mm from its copper edge to the outline.
A trace extending from x = 79.80 mm to x = 80.20 mm, physically crossing the board outline.

layout_2d readback showed all three traces at their requested coordinates, unchanged. The crossing trace remained outside the outline.

DRC behavior

The requested keepout/protected-intrusion/outside-board checks reported only the expected three dangling-trace warnings. No keep-in, keepout, or out-of-board violation was produced for either the 0.20 mm-clearance canary or the trace crossing the outline.

Cleanup and final disposition

All three canary traces and the temporary ruleset were deleted. Readback confirmed the GND net again contains only its fill. The existing routed-edge ruleset remains disabled and now records the concrete failure:

Text
name: Copper-to-Routed-Edge Clearance Placeholder ~
selector: net
disabled: true
rules: none

The proof establishes that net { keepIn: layout(0.40mm) } is syntactically stored but ineffective in this project: it is absent from computed rules, does not constrain geometry, and does not generate the relevant DRC. The only confirmed edge mechanism remains the fill-specific boardInsetMargin.

Bottom line
What was inspected
Rule-key support/readback
Documentation examined
Exact copper-edge candidate combinations
Why `net` + `keepIn: layout(0.40mm)` was not accepted
Other candidate rules actually attempted and later reverted or replaced
1. `trace` selector alias probe
2. `routeSegment` versus `trace`
3. Quoted SMD enum selector probe
4. Silkscreen layer-qualified selectors
5. Per-trace spacing rule
6. Temporary stackup candidates
7. Temporary geometry cleanup
Conclusion
Controlled proof performed after the initial report
Parse and ruleset readback
Computed-rule readback
Geometry canaries
DRC behavior
Cleanup and final disposition