Via Keepout Selector
Thought for 1 min 24 sec
Thought for 7 sec
Reading Low SDI Rule Migration's report…
Thought for 7 sec
4/4 Independently verify values, ordering, disabled states, and final counts
Audit current stackup, active rules, and placeholders after the stopped migration
Reapply the complete Universal Low SDI (SMD) stackup and active rules
Update placeholders, delete inner-layer placeholders, and add component-edge placeholder
Independently verify values, ordering, disabled states, and final counts
Thought for 10 sec
Created a thread
PCB Rule Verification
Completed
View Thread
Thought for 6 sec
Awaiting 1 background task
Received notification from "PCB Rule Verification" that it finished — picking the work back up.
Thought for 35 sec
Successfully reapplied and independently verified the Universal Low SDI (SMD) profile:
- 2-layer, 1.60 mm stackup with 35 µm outer copper
- 18 active rulesets, including the active 0.80 mm slot floor
boardInsetMarginset to 0.60 mm- 20 disabled, value-free placeholders
- Correct QFN/BGA priority after generic IC spacing
- No duplicates or stale active standard-profile rules
The “Standard 4 Layer” manufacturing-target badge remains metadata only; the actual custom stackup reads back correctly as two layers.
Audit active rules
Inspect placeholders
Check manufacturing target
Rename the project
