PDLC Controller
how do I send what we have to a PCB company to complete what i've already done so they can quote?
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Best path: share the Flux project directly with the PCB designer/engineering firm, plus send them the project docs/specs; don’t send it as a fabrication package yet because the board still has unresolved airwires and is not manufacturing-ready. Flux docs say: “When working with other Flux users, you can simply share your project within Flux—there's typically no need to export files for collaboration purposes.” Source
For a quote to finish the design, send:
- Flux project link/access
- Project Specification, Architecture Overview, Validation Plan, Risk Register
- Note: “110 VAC mains-input PDLC controller, 25 W+, ~70 VAC square-wave output, ramp-up/ramp-down, safety-minded consumer design”
- Current status: schematic partly converted, PCB placed, routing incomplete
For manufacturing quote later, export Gerbers/BOM/pick-and-place only after DRC is clean; export guidance says airwires, overlapping copper, or missing footprints should block manufacturing export because the board may be unmanufacturable .
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Project Specification
Design Summary
- Status: Draft
- Manufacturing target: Prototype / EVT
- Project: 110 VAC PDLC Controller
This project redesigns the earlier low-voltage concept into a consumer-oriented, safety-minded PDLC film controller with 110 VAC mains input, AC square-wave film drive, and controlled ramp-up / ramp-down behavior.
Scope
Purpose
Design a mains-input controller capable of driving approximately 100 sq/ft of PDLC film at about 0.25 W/sq ft for an estimated 25 W nominal load, while preserving the key functional behavior seen in the Gauzy FLEX DUO class of products without directly cloning that design.
In scope
- 110 VAC mains input architecture
- Consumer-oriented protection and safety partitioning
- High-voltage AC square-wave PDLC output stage
- Ramp-up and ramp-down output behavior
- Frequency selection and line-synchronous operating modes
- Status, fault, and external control interfaces
- Requirements baseline for schematic implementation and validation
Out of scope
- Direct component-for-component reverse engineering of Gauzy hardware
- Final industrial design, enclosure, and certification paperwork
- Multi-channel expansion beyond a single PDLC output channel unless later added
- Final firmware implementation details beyond architectural hooks
System Context
The controller is intended to sit between building mains and a PDLC film panel. It accepts AC mains power, generates an internal high-voltage energy bus and low-voltage control rails, and produces a controlled AC output that drives the film between translucent and transparent states. It also exposes external control/status interfaces consistent with the reference product family.
Key interfaces
- Power input: 110 VAC nominal mains input
- Film output: two-wire AC output to PDLC film
- Control inputs: dry contact, high-voltage trigger option, 0-10 V input, RS-485 / DMX / COM style control hooks
- Status outputs: ALARM and OUT OK style signals
- Service/debug: local debug/programming interface for bring-up
Requirements
Functional
- The controller shall accept 110 VAC nominal mains input.
- The controller shall support a PDLC load of approximately 100 sq/ft at ~0.25 W/sq ft, equivalent to about 25 W nominal output load.
- The controller shall generate an AC square-wave output suitable for PDLC film drive.
- The controller shall support output frequency modes aligned to the reference behavior: LINE, LINE/2, and 32 Hz, corresponding to 25/30/32/50/60 Hz depending on mains region and configuration.
- The controller shall implement controlled ramp-up and controlled ramp-down behavior rather than abrupt hard switching.
- The controller shall detect or otherwise reference input line zero crossing as part of the ramp strategy or equivalent transient-reduction method.
- The controller shall support at least these external control modes in the architecture: dry contact, 0-10 V control, and RS-485 / DMX / COM provisions.
- The controller shall provide at least ALARM and OUT OK style status signaling.
- The controller shall include a mute / opaque override behavior hook consistent with the reference feature set.
Electrical
- Input power shall be 110 VAC nominal, 50/60 Hz.
- The architecture shall preserve compatibility with a possible 110/240 VAC universal-input variant, even if the first implementation is targeted at 110 VAC only.
- The design shall be sized above 25 W nominal to allow efficiency loss, startup margin, and production tolerance.
- The nominal film output target shall follow the reference class of approximately 70 VAC square wave; exact output voltage tolerance remains to be finalized during detailed design.
- The design shall include a rectified bulk HV bus, a low-voltage auxiliary control supply, and a controlled inverter/output stage.
- The design shall include sensing sufficient to supervise at minimum:
- input or bus voltage health
- output voltage behavior
- output short-circuit or overload behavior
- auxiliary supply validity
- The design shall include protection functions aligned with the reference materials:
- over-voltage
- short-circuit protection
- DC blocking
- The design shall prevent destructive startup transients on film busbars by using a controlled output ramp strategy.
Mechanical / Environmental
- The design shall target indoor consumer/commercial PDLC controller use.
- Hazardous-voltage and low-voltage user-accessible interfaces shall be clearly partitioned.
- Connectoring shall support mains input, PDLC output, control input(s), and status wiring without ambiguous field wiring.
- PCB rules and mechanical arrangement shall support safe creepage/clearance and practical serviceability.
Key Constraints
- This is a redesign inspired by Gauzy FLEX DUO behavior, not a direct clone.
- The earlier 12 V DC input architecture is obsolete and shall not be used as the baseline for the mains redesign.
- Consumer-oriented safety and fault behavior take priority over minimizing part count.
- Frequency-selection behavior and ramp profile must remain compatible with the uploaded reference material.
- The high-voltage output stage must be reviewed for thermal stress, capacitor-current stress, and transformer/inverter stress at the 25 W class load.
Dependencies and Risks
Dependencies
- Final target output voltage tolerance for the selected PDLC film stack
- Exact ramp timing expectations for turn-on and turn-off
- Final decision on isolated vs non-isolated auxiliary/control supply
- Firmware/control-state-machine definition for external interface behavior
Key risks
- Incorrect output-stage sizing for the actual PDLC equivalent load capacitance
- Unsafe or insufficiently controlled startup transient behavior
- Inadequate creepage/clearance or field-interface partitioning for mains safety
- Ambiguity between line-synchronized and free-running frequency modes during implementation
Validation
Success criteria
- Demonstrate safe operation from 110 VAC mains input.
- Demonstrate stable PDLC output drive for approximately 25 W nominal load.
- Demonstrate AC square-wave output at the supported operating modes.
- Demonstrate controlled ramp-up and ramp-down behavior without destructive startup transients.
- Demonstrate fault detection and safe response for output short and abnormal bus/output conditions.
Planned checks
- Requirements review against uploaded reference behavior
- Architecture review of mains front end, HV bus, control supply, and inverter
- Bench bring-up of low-voltage auxiliary supply before output-stage enable
- Oscilloscope verification of output voltage, frequency, zero-cross-related startup behavior, and ramp profile
- Thermal and protection review at representative PDLC-equivalent loading
Release-Facing Notes
Expected deliverables
- Partitioned schematic for mains input, HV bus, control supply, inverter, output, sensing, and interfaces
- Requirements and architecture documentation
- Validation plan and risk register
- Review-ready baseline for detailed component selection and PCB implementation
Special release notes
- Maintain explicit separation of hazardous mains/HV nets from logic/control interfaces.
- Reserve test access for HV bus, auxiliary rail, output sense, and fault/status nodes.
- Do not reuse the existing 12 V front end in the final mains-input design.
Change Notes / Open Questions
Changes in this revision
- Replaced the placeholder 12 V input assumption with a mains-input requirements baseline.
- Added explicit support for AC square-wave output and ramp-up / ramp-down behavior.
- Added external control and status expectations based on the uploaded reference manual.
Open questions
- Final output-voltage tolerance around the nominal 70 VAC target
- Required ramp-up and ramp-down duration targets for production behavior
- Universal-input support in the first hardware revision vs later variant
- Isolation boundary choice for control and external communications
Design Summary
Scope
Purpose
In scope
Out of scope
System Context
Key interfaces
Requirements
Functional
Electrical
Mechanical / Environmental
Key Constraints
Dependencies and Risks
Dependencies
Key risks
Validation
Success criteria
Planned checks
Release-Facing Notes
Expected deliverables
Special release notes
Change Notes / Open Questions
Changes in this revision
Open questions
