• Status: Draft / reconstruction in progress.
• Goal: Recreate the uploaded KiCad 5-era Hades multi-sheet flight-computer schematic and PCB inside Flux.
• Source references: Hades.sch, FCC.sch, FCCPeripherals.sch, NAVC.sch, NAVCPeripherals.sch, Connections.sch, Sensors.sch, and Hades.kicad_pcb.
• Important constraint: The KiCad schematic and PCB cannot be imported as a complete design through the available importer; reconstruction is manual and reference-driven.

• Prototype/educational reconstruction of a flight-computer style PCB.
• The original design appears to combine a flight control computer, navigation computer, sensor suite, power regulation, storage, GPS/RF interface, USB/debug/programming, and board-to-wire connectors.

• Accept battery/input power through an XT60-style connector and generate a 3.3 V logic rail.
• Monitor input current/voltage using an INA219 current/power monitor.
• Run an STM32H753-based flight control computer (FCC).
• Run an STM32F405-based navigation computer (NAVC).
• Provide I2C, SPI, UART, USB, SWD, PWM, ADC, GPIO, GPS, and sensor interfaces.
• Support inertial, magnetic, temperature, and GPS-related sensing/IO.
• Preserve the functional connectivity, component choices, board outline, stackup intent, and placement/routing references from the uploaded KiCad files where possible.

• Dual MCU architecture: STM32H753VITx FCC and STM32F405RGTx NAVC.
• 3.3 V embedded system rail from a high-current synchronous buck regulator.
• Power measurement with shunt resistor and INA219AIDCNR.
• Multiple I2C buses with pull-ups and external connectors.
• SPI flash/storage devices.
• PWM generation/headers using PCA9685PW and pin headers.
• Sensor suite including BMI088, IIS2MDCTR, TMP100, and GPS-related circuitry.
• USB Micro-B connectors, USB-UART bridges, and SWD headers.
• 4-layer PCB reference: F.Cu, In1.Cu, In2.Cu, B.Cu.

Diagram

• Source reference: Hades.sch.
• Input: XT60-M battery/input connector.
• Current sensing: 0.01 ohm shunt and INA219AIDCNR.
• Regulator: MIC26903YJL-TR synchronous buck, 15 uH inductor, bootstrap diode/capacitor, feedback network, output capacitors.
• Primary logic rail: 3.3 V / +3V3 naming appears across sheets.

• Source references: FCC.sch, FCCPeripherals.sch.
• MCU: STM32H753VITx in LQFP-100.
• Peripherals: PCA9685PW PWM driver, 24CW1280 EEPROM, W25N01GVZEIG SPI NAND/flash, LEDs, crystal, reset/boot controls, I2C pull-ups, UART/I2C/ADC/RC/PWM connectors.

• Source references: NAVC.sch, NAVCPeripherals.sch.
• MCU: STM32F405RGTx in LQFP-64.
• Peripherals: BMI088 IMU, IIS2MDCTR magnetometer, TMP100 temperature sensor, EEPROM, GPS connector/interface, RF connector/antenna network, reset/boot controls, LEDs, I2C pull-ups.

• Source reference: Connections.sch.
• FCC↔NAVC interconnects via GPIO, UART, I2C.
• USB Micro-B connectors and 22 ohm USB series resistors.
• CH330 USB-UART bridges.
• SWD connectors for FCC and NAVC.
• GPS backup battery connector and jumper.

• Power input: XT60-M.
• USB: multiple Micro-B USB connectors.
• Debug: SWD 2x5 headers.
• External IO: PicoBlade connectors, 2.54 mm pin headers, PWM headers, ADC/I2C/UART/RC input connectors.
• RF/GPS: GPS connector plus SMA/QMA-style RF connector and matching/filter network.
• MCU interconnect: UART2, I2C, GPIO A-H between FCC and NAVC.

• Runtime is not specified in the source references.
• Primary available source information is the original schematic power tree and component selections.
• A formal power budget must be reconstructed before finalizing power-path ratings and layout copper widths.

Diagram

• Recreate as a 4-layer PCB matching the KiCad reference intent.
• KiCad PCB reference reported: 1.6 mm board thickness, 4 copper layers, 215 modules, 252 nets, 2360 tracks, and extensive drawings.
• Original footprints are KiCad library/custom footprint names; Flux equivalents must be matched or custom parts created where necessary.

• STM32 clock/reset/boot configuration must match the original schematic.
• Preserve all named nets for firmware pin mapping: UART, I2C, SPI, USB, SWD, ADC, PWM, GPIO, interrupt, GPS, and LED nets.
• Create a firmware pin mapping file after schematic reconstruction is complete.

• Recreate the board outline from Hades.kicad_pcb Edge.Cuts data.
• Recreate 4-layer stackup and placement using the KiCad PCB as a visual/reference source.
• High-priority placement: power regulator/current shunt/XT60 first, MCUs and crystals/decoupling, USB/debug connectors, sensors, GPS/RF/antenna region, external connectors.

• Manual reconstruction will proceed block-by-block, not as a direct import.
• Schematic comes before PCB layout to avoid propagating connectivity mistakes into layout.
• Flux library parts are preferred; generic passives are acceptable for resistors/capacitors/inductors when no exact MPN is required.
• Missing custom KiCad parts will be searched in the Flux library first, then resolved with datasheet-backed alternatives or user-provided libraries.

• The uploaded KiCad files are the authoritative reference.
• The empty Flux project is the target “new design.”
• Functional equivalence is the priority; exact trace geometry from KiCad may need approximation if direct layout import is unavailable.
• Sensors.sch is empty and appears not to be part of the six-sheet Hades hierarchy.

• 2026-07-20: User approved reconstructing the uploaded KiCad design in this Flux project. Project renamed to “Hades Flight Computer.” Initial reconstruction specification created.