Sensor Node Development Guide
Yes, أصلح USB D+/D- ونظّف الـdangling/floating copper ثم أعد DRC.
Thought for 16 sec
تمام، سأركز الآن على تنظيف مسارات USB D+/D- والـfloating/dangling copper المتبقي، ثم أعيد DRC للتحقق.
Thought for 20 sec
توقفت هنا لأن حسابك لا يملك ACUs متاحة حاليًا، لذلك لا أستطيع تشغيل أدوات التعديل أو DRC الآن.
ما تم إنجازه حتى الآن:
- أُضيف مدخل 5V خارجي عالي التيار مع حماية PTC + Schottky + bulk capacitor.
- تم فصل
LED_5Vعن5V_PROTECTEDالخاص بالمنطق/USB. - تم تحويل أغلب المقاومات والمكثفات العامة إلى 0805، مع استثناءات هندسية موثقة مثل L1 وC12.
- تم عمل PCB layout وتوجيه تلقائي على 4 طبقات.
- تم توثيق الحالة في ملف: Layout, DRC, and BOM Review.
المتبقي عند توفر ACUs:
- تنظيف مسارات USB D+/D- يدويًا أو بتوجيه موجه.
- حذف آثار dangling/floating copper المتبقية.
- إصلاح overlapping copper قرب أحد مخارج الإشارات.
- إعادة DRC حتى يصبح التصميم جاهزًا للتصنيع.
إرشاد يدوي
مناطق الفحص
Checklist DRC
مخاطر التصنيع
Refine this doc
Ask about this doc
Board Bring-Up Plan — ESP32-S3 Multi-Port LED Controller
Status
Draft for first assembled boards.
Safety / Setup
- Use a current-limited USB-C bench supply first.
- Start with no external LED/load cables connected.
- Do not power high-current LED strips from the controller USB rail unless the current limit and thermal design are revised.
Step 1 — Visual Inspection
- Confirm ESP32-S3 module orientation.
- Confirm USB-C connector solder joints.
- Confirm TPS25200, MP28301, SN74HCT245, TVS diode orientation.
- Check for shorts around JST-XH connectors.
Step 2 — Resistance Checks Before Power
Table
| Check | Expected |
|---|---|
| VBUS_RAW to GND | No short |
| 5V_PROTECTED to GND | No short |
| 3V3 to GND | No short |
| Each DATA/CLK output to GND | No hard short |
Step 3 — First Power
- Apply 5V over USB-C with current limit around 100–300mA initially.
- Verify VBUS_RAW is present at J1.
- Verify 5V_PROTECTED after U4.
- Verify 3V3 at U1 pin 3V3 and C11.
Step 4 — ESP32-S3 Programming
- Connect USB-C to a host PC.
- Confirm USB Serial/JTAG enumerates.
- If not, hold BOOT, press/release EN, then release BOOT.
- Flash the firmware starter project.
Step 5 — Logic Output Validation
Table
| Signal | Probe Point | Expected |
|---|---|---|
| DATA1–DATA8 3.3V | U2 A inputs | ESP32 3.3V pulses |
| DATA1–DATA8 5V | J2–J9 pin 3 | Level-shifted pulses |
| CLK_SHARED 3.3V | U3 A1 | ESP32 3.3V clock |
| CLK per port | J2–J9 pin 4 | 5V clock through 33Ω series resistors |
Step 6 — Connector Test
- Connect one short LED/control cable at a time.
- Start with CH1 only.
- Verify signal quality at the far cable end.
- Repeat for CH2–CH8.
Pass/Fail Criteria
- 3V3 rail within regulator tolerance and stable during Wi-Fi activity.
- ESP32-S3 programs over USB.
- All 8 DATA outputs switch independently.
- All 8 CLK pins follow the shared clock output.
- No excessive heating on U4, U5, U2, or U3.
Open Items
- Confirm final eFuse current-limit resistor value from system current target.
- Decide whether the output 5V pins are logic/accessory only or need a separate high-current LED power input.
- Layout must enforce ESP32 antenna keepout and place TVS near connectors.
Status
Safety / Setup
Step 1 — Visual Inspection
Step 2 — Resistance Checks Before Power
Step 3 — First Power
Step 4 — ESP32-S3 Programming
Step 5 — Logic Output Validation
Step 6 — Connector Test
Pass/Fail Criteria
Open Items
