PCB Design for Control System


I ran out of execution credits during the placement-fix pass, so I stopped before placement adjustment, routing, or final DRC.
Completed so far:
  1. Battery keepouts added: YES — added 2 mechanical keepout zones:
    • BAT_CELL_A_32700_KEEP_OUT
    • BAT_CELL_B_32700_KEEP_OUT
  2. Fiducials added: YES — added 3 global fiducials:
    • FID1_GLOBAL
    • FID2_GLOBAL
    • FID3_GLOBAL
  3. Mounting holes added: YES — added 4 mounting holes:
    • MH1_MOUNT
    • MH2_MOUNT
    • MH3_MOUNT
    • MH4_MOUNT
  4. ESP32 antenna keepout added: YES — added ESP32_ANTENNA_KEEP_OUT
  5. GNSS keepout added: YES — added GNSS_ANTENNA_KEEP_OUT
  6. LoRa keepout added: YES — added LORA_ANTENNA_KEEP_OUT
  7. ELECTRODE_A_HV keepout added: YES — added ELECTRODE_A_HV_ISOLATION_KEEP_OUT
  8. Flex-tail support added: PARTIAL — added FLEX_TAIL_POTTING_STRAIN_RELIEF_KEEP_OUT, FLEX_PIN1_MARK, and two flex alignment marks.
  9. HV warning silkscreen added: YES — added HV_WARNING_TEXT
  10. Routed: NO
  11. Remaining unrouted nets count: not rechecked after the added keepouts; previously expected airwires remained because the board was not routed.
  12. Remaining DRC error count: not rechecked after the added keepouts.
Still needed before routing:
  • Run one placement adjustment pass to move components/test points out of the new battery, antenna, flex, and HV keepouts.
  • Verify mounting holes/fiducials have adequate clearance.
  • Verify flex-tail zones are physically separated.
  • Run DRC and confirm the only remaining DRC issues are airwires.
  • Only then proceed with routing if blockers are resolved.
Run DRC blockers
Fix placement conflicts
Verify flex zones
Check assembly clearances
Inspect RF paths

CONTROL_RF_PCB Project Specification
Project Overview
Status: Draft schematic in progress.
CONTROL_RF_PCB is a standalone 4-layer rigid FR4 control, RF, GNSS, sensor, local actuator, local battery-cell, and solar-pass-through PCB for an outdoor livestock collar. Target board size is 120 mm x 80 mm with production-prototype design intent and JLCPCB/LCSC-compatible assembly where practical.
Intended Use
  • Outdoor livestock collar electronics module exposed to rain, mud, snow, dust, vibration, and impact.
  • Temperature target: -40C to +50C.
  • Not a bench development board; design should include production-style protection, test access, isolation, and keepouts.
What the Device Should Do
  • Run main control firmware on ESP32-S3-WROOM-1-N16R8.
  • Communicate via 915 MHz LoRa using an SX1262 transceiver and external U.FL antenna.
  • Receive GNSS position data from a u-blox MAX-M10S module with external U.FL antenna.
  • Read motion from BMA400 accelerometer over I2C.
  • Read ambient/local temperature from TMP117 over I2C.
  • Capture audio using ICS-43434 I2S MEMS microphone.
  • Drive one off-board vibration motor and one off-board waterproof piezo buzzer through low-side MOSFET drivers.
  • Provide local 2 x 32700 LiFePO4 cell solder-tab/holder pads tied to the shared 1S pack bus.
  • Pass solar panel A input through to an external power board; this board does not charge the battery.
  • Carry an isolated high-voltage electrode pad from an external stimulation board; this board does not generate high voltage.
Main Features
  • ESP32-S3 MCU with EN/reset, IO0 boot/programming, UART debug/programming header, and test points.
  • SX1262 LoRa RF section with 915 MHz matching/pi tuning footprint, RF ESD, U.FL, and antenna keepout.
  • MAX-M10S GNSS section with filtered 3V3 supply, backup supply footprint if supported, RF ESD, U.FL, and antenna keepout.
  • I2C sensor bus with pull-ups and sensor interrupt nets.
  • I2S MEMS microphone with acoustic port keepout and port marker.
  • Local actuator drivers with gate resistors, pulldowns, transient protection, and test points.
  • Soldered flex-tail landing area with four physical zones: low-voltage signal, high-current battery, solar pass-through, and isolated HV electrode.
  • Extensive labeled test points.
System Architecture

Diagram


External power board regulated node_3V3 J_FLEX_TAIL_CONTROL 2 x local 32700 LiFePO4 cells CELL_PACK_PLUS / PACK_GND bus 6V node_1W solar panel A SOLAR_A_PLUS pass-through ESP32-S3-WROOM-1-N16R8 SX1262 LoRa 915 MHz U.FL LoRa antenna MAX-M10S GNSS U.FL GNSS antenna I2C bus BMA400 accelerometer TMP117 temperature sensor ICS-43434 I2S microphone Vibration motor low-side driver Buzzer low-side driver External stimulation board ELECTRODE_A_HV isolated pad
Hardware Subsystems
Power
  • Required nets: CELL_PACK_PLUS, PACK_GND, 3V3.
  • 3V3 is received already regulated from external power board through soldered flex tail.
  • No charger, BMS, 3V3 regulator, or stimulation generator on this PCB.
  • Bulk capacitance near flex tail 3V3 input.
  • 0.1uF decoupling near every IC.
  • 10uF or larger near ESP32, SX1262, and GNSS.
  • Battery and solar voltage sense dividers to ESP32 ADC with protection/clamp as needed.
Compute and Debug
  • ESP32-S3-WROOM-1-N16R8 main MCU.
  • EN/reset RC circuit and reset access.
  • IO0 boot/programming circuit.
  • UART programming/debug header.
  • Test points: ESP_EN, ESP_IO0, UART_TX, UART_RX, 3V3, GND.
RF / GNSS
  • SX1262 LoRa on SPI with LoRa control pins.
  • 915 MHz matching network and pi-network tuning footprint.
  • U.FL antenna connectors and ESD protection.
  • MAX-M10S GNSS on UART with clean filtered 3V3 supply and optional backup supply footprint if supported.
  • RF and GNSS sections near outside board edge with antenna keepouts and no copper under keepouts.
Sensors
  • BMA400 I2C accelerometer: I2C_SCL, I2C_SDA, IMU_INT1, IMU_INT2.
  • TMP117 I2C temperature sensor: I2C_SCL, I2C_SDA; place away from heat sources.
  • ICS-43434 I2S MEMS microphone: MIC_BCLK, MIC_WS, MIC_SD; place away from motor, buzzer, high-current pads, switching noise, and vibration sources.
Actuators
  • Vibration motor A on connector/pads J_VIB_A with N-channel low-side MOSFET, gate resistor, gate pulldown, flyback/transient protection, and test points VIB_A_PWM and VIB_A_OUT.
  • Waterproof piezo buzzer A on connector/pads J_BUZZ_A with N-channel low-side MOSFET, gate resistor, gate pulldown, transient protection if needed, and test points BUZZ_A_PWM and BUZZ_A_OUT.
Electrode Isolation
  • J_ELECTRODE_A isolated pad/connector on ELECTRODE_A_HV.
  • HV arrives from external stimulation board through soldered flex tail.
  • Keep ELECTRODE_A_HV isolated from RF, GNSS, microphone, 3V3, I2C, SPI, and UART.
  • Add copper keepout and silkscreen warning around electrode route.
Interfaces and Connections
  • LoRa SPI/control nets: LORA_SCK, LORA_MOSI, LORA_MISO, LORA_NSS, LORA_RESET, LORA_BUSY, LORA_DIO1.
  • GNSS UART nets: GNSS_TX, GNSS_RX.
  • I2C nets: I2C_SCL, I2C_SDA.
  • Sensor/actuator nets: IMU_INT1, IMU_INT2, MIC_BCLK, MIC_WS, MIC_SD, VIB_A_PWM, BUZZ_A_PWM.
  • Power/sense nets: CELL_PACK_PLUS, PACK_GND, 3V3, BAT_SENSE_A, SOLAR_A_PLUS, SOLAR_A_SENSE.
  • Flex-tail low-voltage Zone 1 pinout: GND, GND, 3V3, 3V3, I2C_SCL, I2C_SDA, ACTUATOR_B_VIB_PWM, ACTUATOR_B_BUZZ_PWM, SHOCK_ENABLE, SHOCK_PULSE, SHOCK_FAULT, CHG_STAT1, CHG_STAT2, BAT_TEMP_B, BAT_SENSE_B, SOLAR_A_SENSE, SPARE_GPIO1, SPARE_GPIO2, SPARE_GPIO3, GND.
  • Flex-tail Zone 2: at least two CELL_PACK_PLUS pads and two PACK_GND pads rated for at least 5A margin.
  • Flex-tail Zone 3: SOLAR_A_PLUS pass-through pad; solar return uses PACK_GND.
  • Flex-tail Zone 4: isolated ELECTRODE_A_HV pad.
Power and Runtime Expectations
  • External board provides regulated 3V3.
  • Local cells are LiFePO4 32700, final pack configuration 4P1S, with local two cells tied to shared 1S pack bus.
  • Solar panel A: 6V nominal, 1W, approximately 110 mm x 60 mm; this board only passes solar input through.
  • Runtime target not specified yet.
Power Tree and Power Budget
Initial design budget is provisional until datasheets are consulted and exact operating modes are finalized.

Table


Rail / SourceLoads or Pass-throughDesign Notes
3V3ESP32-S3, SX1262, MAX-M10S, BMA400, TMP117, ICS-43434, pull-ups, ADC dividersProvided externally; add local bulk and decoupling.
CELL_PACK_PLUSLocal 32700 cell pads, battery sense divider, flex-tail high-current pads1S LiFePO4 pack bus; design high-current copper/pads for 5A margin where specified.
SOLAR_A_PLUSSolar panel A pass-through and optional sense dividerNot used for charging on this board; add TVS/ESD and input filter.
ELECTRODE_A_HVIsolated electrode pass-through padNo generation or low-voltage interaction on this board.
Manufacturing and Assembly Expectations
  • 4-layer rigid FR4 PCB.
  • Stackup target: L1 signal/components, L2 solid GND plane, L3 power routing, L4 signal.
  • Target assembly through JLCPCB/LCSC where practical.
  • Exposed soldered flex-tail landing area instead of FPC/ZIF connector.
  • Production prototype: include fiducials/alignment marks, test points, protection, keepouts, and silkscreen warnings.
Firmware-Relevant Hardware Requirements
  • ESP32-S3 pin assignment must support LoRa SPI, GNSS UART, I2C sensors, I2S microphone, PWM actuator outputs, ADC battery/solar sensing, and flex-tail external control/status nets.
  • Boot and reset access required through IO0 and EN.
  • UART programming/debug header required.
  • Firmware starter file will be generated after schematic pin assignments are finalized.
Physical Design Expectations
  • Board target size: 120 mm x 80 mm.
  • RF and GNSS near outside board edge.
  • Antennas clear of battery cells and flex tail.
  • Microphone away from vibration motor, buzzer, high-current pads, and switching noise.
  • TMP117 away from heat sources.
  • Electrode route isolated with copper keepout and HV warning.
  • No autorouting until placement is approved.
Important Design Decisions
  • Use module-based ESP32-S3 to avoid custom WiFi/BLE RF design.
  • Use external U.FL antennas for LoRa and GNSS.
  • Keep charging, BMS, 3V3 regulation, and stimulation generation off-board per user request.
  • Use a 4-layer stackup with solid L2 ground plane for RF return paths and signal integrity.
Assumptions
  • SMD assembly is preferred because this is a production-prototype board and JLCPCB/LCSC assembly is targeted.
  • External power board can supply sufficient 3V3 peak current for ESP32-S3 WiFi/BLE plus SX1262 transmit and GNSS operation.
  • Flex-tail pads and battery solder pads may require custom footprint/layout nodes if exact mechanical drawing is not available.
  • Exact RF matching values may need tuning with VNA measurements; schematic will include pi-network footprints and nominal reference values from datasheets/reference designs where available.
Change Notes
  • Initial specification created from the user request.
  • Project Overview

  • Intended Use

  • What the Device Should Do

  • Main Features

  • System Architecture

  • Hardware Subsystems

  • Power

  • Compute and Debug

  • RF / GNSS

  • Sensors

  • Actuators

  • Electrode Isolation

  • Interfaces and Connections

  • Power and Runtime Expectations

  • Power Tree and Power Budget

  • Manufacturing and Assembly Expectations

  • Firmware-Relevant Hardware Requirements

  • Physical Design Expectations

  • Important Design Decisions

  • Assumptions

  • Change Notes