AI Availability Inquiry

Worked for 26 mins 10 sec

Routing improved, but RUN/GND verification found RUN split and some reset pins still on GND. I’m correcting that now before wrapping up.

Worked for 2 mins 41 sec

flux

I re-routed using the active 6-layer stackup: fixed the auto-positioned TP pad blockers, reduced trace width for U1 fine-pitch routing, cancelled the stale out-of-credit route job, and ran two routing passes. Airwires improved from 53 → 9, but the router left 9 airwires, 3 overlapping-copper errors, and 22 dangling-trace warnings.

Open items:

RUN/GND connectivity is not clean: verification shows the RUN-side reset pins are still in a separate 12-pin net labeled GND despite repeated attempts to move them to RUN. I escalated this as a platform/data-repair issue.
Remaining DRC: 9 airwires, 3 overlapping-copper errors, 22 dangling-trace warnings.
Auto-route preflight still reports a duplicate-via cleanup warning.

Suggested next steps:

Repair the RUN net manually or via project history/data repair before manufacturing.
Re-run ERC on SW_RESET, U1:RUN, R_RUN:P1, C_RUN:P1, and J7:6.
Manually clean the 3 overlapping-copper errors, then route the final 9 airwires.

Fix RUN, copper, DRC

Fix RUN net

Inspect commit diff

Clean DRC errors

Manual final routing

D_USB

J_USB

J2 4 - D2 A

R4 P2 - LED_B_TX ~

U1 RUN - R_RUN P1

J5 17 - U1 GPIO23

J1 3 - D_TVS_TX_A A

CABLE_A_TX

J5 13 - U1 GPIO21

U1 DVDD - U1 VREG_FB

U1 QSPI_SD1 - U2 DO(IO1)

U1 IOVDD - U1 QSPI_IOVDD

R7 P2 - LED_B_EGM A

J5 1 - U1 GPIO15

R6 P2 - LED_B_HOST ~

U1 QSPI_SS - U2 /CS

J1 3 - D_TVS_TX_A A

U1 GPIO4 - R2 P1

+5V

R8 P2 - LED_HB ~

U3 VOUT - TP1 P1

U4 FB - R_FB_HI P2

J1 4 - D1 A

J_USB DN1 - J_USB DN2

U1 XOUT - Y1 ~

U1 IOVDD - U1 QSPI_IOVDD

CABLE_A_TX

U_RS232_B V+ - C19 P1

U1 GPIO14 - SW_SOFTBOOT ~1

D1 C - D2 C

U1 GPIO9 - R5 P1

J2 3 - D_TVS_TX_B A

U1 GPIO1 - U_OPTO_RX_A VO

U4 SW - L1 P2

U1 GPIO0 - U7_BUF 1A

R5 P2 - LED_B_RX A

U1 GPIO11 - R7 P1

J5 20 - U1 GPIO28_ADC2

R3 P2 - LED_A_EGM A

U1 GPIO7 - U_OPTO_RX_B VO

U1 RUN - R_RUN P1

J1 4 - D1 A

D1 C - D2 C

J2 4 - D2 A

U1 GPIO8 - R4 P1

USB_DP

J_USB VBUS__1 - U3 VIN

D3 A - D_BOOST C

J5 20 - U1 GPIO28_ADC2

R_LED1 P2 - LED_A_TX ~

CABLE_A_TX

U3 VOUT - TP1 P1

U1 GPIO9 - R5 P1

U3 VOUT - TP1 P1

U4 FB - R_FB_HI P2

U1 GPIO5 - R3 P1

R6 P2 - LED_B_HOST ~

J2 2 - D_TVS_RX_B A

U_RS232_A C2- - C13 P2

J_USB CC2 - R_CC2 P1

U1 QSPI_SS - U2 /CS

U1 GPIO10 - R6 P1

U1 QSPI_SCLK - U2 CLK

J5 19 - U1 GPIO24

U3 VOUT - TP1 P1

J2 3 - D_TVS_TX_B A

U1 QSPI_SD0 - U2 DI(IO0)

R_ADC_HI_A P2 - R_ADC_LO_A P1

J5 3 - U1 GPIO16

U3 EN - U4 VIN

U1 GPIO1 - U_OPTO_RX_A VO

U_RS232_B C2+ - C18 P1

U_RS232_B C1+ - C17 P1

R8 P2 - LED_HB ~

R2 P2 - LED_A_HOST ~

U1 QSPI_SD3 - U2 /RESET(IO3)

J_USB DP1 - J_USB DP2

U4 SW - L1 P2

U_RS232_B C2- - C18 P2

U1 GPIO25 - R8 P1

R_ADC_HI_A P2 - R_ADC_LO_A P1

U1 GPIO14 - SW_SOFTBOOT ~1

U3 VOUT - TP1 P1

U1 IOVDD - U1 QSPI_IOVDD

J2 4 - D2 A

J2 2 - D_TVS_RX_B A

J_USB VBUS__1 - U3 VIN

U3 VOUT - TP1 P1

U_RS232_A C2+ - C13 P1

U1 QSPI_SD0 - U2 DI(IO0)

R_ADC_HI_B P2 - R_ADC_LO_B P1

U3 VOUT - TP1 P1

J7 4 - U1 SWCLK

J_USB DP1 - J_USB DP2

U3 VOUT - TP1 P1

U_RS232_B C2+ - C18 P1

J5 3 - U1 GPIO16

U3 VOUT - TP1 P1

U1 GPIO0 - U7_BUF 1A

U1 RUN - R_RUN P1

J_USB CC1 - R_CC1 P1

J5 19 - U1 GPIO24

R5 P2 - LED_B_RX A

U3 VOUT - TP1 P1

U4 FB - R_FB_HI P2

U1 XIN - Y1 ~

J5 7 - U1 GPIO18

J7 4 - U1 SWCLK

J7 2 - U1 SWDIO

U_RS232_B V+ - C19 P1

U_RS232_B C1+ - C17 P1

J1 4 - D1 A

U1 GPIO11 - R7 P1

U1 GPIO13 - R11 P1

J1 4 - D1 A

U1 XIN - Y1 ~

U1 GPIO6 - U7_BUF 2A

U1 XOUT - Y1 ~

J5 11 - U1 GPIO20

U_RS232_A V+ - C14 P1

J2 3 - D_TVS_TX_B A

USB_DM

J5 13 - U1 GPIO21

J_USB CC1 - R_CC1 P1

U4 SW - L1 P2

U1 GPIO13 - R11 P1

U3 VOUT - TP1 P1

U1 QSPI_SD3 - U2 /RESET(IO3)

U_RS232_B C1- - C17 P2

U3 VOUT - TP1 P1

J2 4 - D2 A

J7 2 - U1 SWDIO

U1 GPIO3 - R1 P1

U3 EN - U4 VIN

Net 47

U_RS232_A C2+ - C13 P1

J1 4 - D1 A

R7 P2 - LED_B_EGM A

U_RS232_A C1- - C_RS232_A1 P2

U1 IOVDD - U1 QSPI_IOVDD

U1 GPIO2 - R_LED1 P1

D1 C - D2 C

R_ADC_HI_B P2 - R_ADC_LO_B P1

J1 3 - D_TVS_TX_A A

J_USB DN1 - J_USB DN2

U3 VOUT - TP1 P1

U1 GPIO7 - U_OPTO_RX_B VO

U1 GPIO4 - R2 P1

U3 VOUT - TP1 P1

D3 A - D_BOOST C

U1 GPIO5 - R3 P1

R3 P2 - LED_A_EGM A

U1 DVDD - U1 VREG_FB

D1 C - D2 C

U1 GPIO12 - R_MODE_A P1

U1 GPIO25 - R8 P1

J5 15 - U1 GPIO22

USB_DP

+5V

J2 2 - D_TVS_RX_B A

D3 A - D_BOOST C

U3 VOUT - TP1 P1

U1 QSPI_SCLK - U2 CLK

+5V

J5 9 - U1 GPIO19

U1 IOVDD - U1 QSPI_IOVDD

U1 QSPI_SD2 - U2 /WP(IO2)

U1 GPIO6 - U7_BUF 2A

U3 VOUT - TP1 P1

U1 QSPI_SD1 - U2 DO(IO1)

U3 VOUT - TP1 P1

R_ADC_HI_A P2 - R_ADC_LO_A P1

U1 GPIO12 - R_MODE_A P1

Net 33

USB_DM

U1 GPIO0 - U7_BUF 1A

U_RS232_A V+ - C14 P1

R2 P2 - LED_A_HOST ~

U1 RUN - R_RUN P1

J_USB CC2 - R_CC2 P1

U_RS232_B V- - C20 P1

+5V

D1 C - D2 C

J5 1 - U1 GPIO15

U_RS232_A C2- - C13 P2

U1 GPIO6 - U7_BUF 2A

J_USB DP1 - J_USB DP2

U1 GPIO2 - R_LED1 P1

U1 GPIO7 - U_OPTO_RX_B VO

U7_BUF 1Y - U_OPTO_TX_A CATHODE

U1 GPIO1 - U_OPTO_RX_A VO

U_RS232_A C1+ - C_RS232_A1 P1

U1 GPIO3 - R1 P1

U7_BUF 2Y - U_OPTO_TX_B CATHODE

U3 VOUT - TP1 P1

U4 EN - TP2 P1

J5 5 - U1 GPIO17

R1 P2 - LED_A_RX A

U1 XIN - Y1 ~

J5 17 - U1 GPIO23

J5 5 - U1 GPIO17

U1 GPIO0 - U7_BUF 1A

U3 VOUT - TP1 P1

U1 GPIO10 - R6 P1

U1 GPIO1 - U_OPTO_RX_A VO

U_RS232_A V- - C15 P1

R_ADC_HI_B P2 - R_ADC_LO_B P1

U1 XOUT - Y1 ~

J2 4 - D2 A

R4 P2 - LED_B_TX ~

U1 GPIO8 - R4 P1

R_LED1 P2 - LED_A_TX ~

R1 P2 - LED_A_RX A

U1 GPIO6 - U7_BUF 2A

J5 7 - U1 GPIO18

U3 VOUT - TP1 P1

U_RS232_A C1- - C_RS232_A1 P2

U3 VOUT - TP1 P1

J5 9 - U1 GPIO19

U3 VOUT - TP1 P1

U_RS232_B C1- - C17 P2

U1 GPIO7 - U_OPTO_RX_B VO

U1 QSPI_SD2 - U2 /WP(IO2)

U_RS232_A V- - C15 P1

U3 VOUT - TP1 P1

U1 RUN - R_RUN P1

U4 EN - TP2 P1

J_USB DN1 - J_USB DN2

U_RS232_B V- - C20 P1

J_USB VBUS__1 - U3 VIN

U4 EN - TP2 P1

J5 11 - U1 GPIO20

U1 IOVDD - U1 QSPI_IOVDD

U4 SW - L1 P2

U_RS232_A C1+ - C_RS232_A1 P1

J5 15 - U1 GPIO22

U_RS232_B C2- - C18 P2

GND

LED_A_TX ~ - LED_A_RX K

C_RUN P2 - SW_RESET ~2

SW_RESET ~4 - U_OPTO_RX_A CATHODE

R_FB_LO P2 - R_ADC_LO_A P2

GND

C19 P2 - C20 P2

U_OPTO_RX_A GND - U_OPTO_RX_B GND

C19 P2 - C20 P2

C1 P2 - C2 P2

GND

J1 1 - J2 1

D_TVS_RX_A K - D_TVS_TX_A K

J5 10 - J5 12

C1 P2 - C2 P2

GND

U_RS232_A GND - U_RS232_B GND

GND

Y1 GND__1 - C_XIN P2

C1 P2 - C2 P2

D_TVS_RX_A K - D_TVS_TX_A K

LED_B_HOST ~ - LED_B_EGM K

C1 P2 - C2 P2

R_FB_LO P2 - R_ADC_LO_A P2

C1 P2 - C2 P2

J5 18 - J6 2

LED_A_EGM K - LED_B_TX ~

C1 P2 - C2 P2

LED_A_TX ~ - LED_A_RX K

SW_RESET ~4 - U_OPTO_RX_A CATHODE

C1 P2 - C2 P2

U_OPTO_RX_A GND - U_OPTO_RX_B GND

LED_A_EGM K - LED_B_TX ~

U_RS232_A GND - U_RS232_B GND

GND

C19 P2 - C20 P2

GND

J5 18 - J6 2

GND

LED_A_TX ~ - LED_A_RX K

D_TVS_RX_A K - D_TVS_TX_A K

SW_RESET ~4 - U_OPTO_RX_A CATHODE

Y1 GND__1 - C_XIN P2

U_RS232_A DIN2 - U_RS232_A RIN2

LED_B_HOST ~ - LED_B_EGM K

R_FB_LO P2 - R_ADC_LO_A P2

C1 P2 - C2 P2

U_OPTO_RX_A GND - U_OPTO_RX_B GND

LED_B_HOST ~ - LED_B_EGM K

C1 P2 - C2 P2

J7 9 - J7 10

R_FB_LO P2 - R_ADC_LO_A P2

GND

U_OPTO_RX_A GND - U_OPTO_RX_B GND

J5 10 - J5 12

GND

C19 P2 - C20 P2

J1 1 - J2 1

GND

U_RS232_A GND - U_RS232_B GND

GND

U_RS232_A GND - U_RS232_B GND

C19 P2 - C20 P2

U_OPTO_RX_A GND - U_OPTO_RX_B GND

D_TVS_RX_A K - D_TVS_TX_A K

GND

C1 P2 - C2 P2

R_FB_LO P2 - R_ADC_LO_A P2

C1 P2 - C2 P2

GND

U_RS232_A DIN2 - U_RS232_A RIN2

SW_RESET ~4 - U_OPTO_RX_A CATHODE

J7 9 - J7 10

LED_A_EGM K - LED_B_TX ~

Y1 GND__1 - C_XIN P2

C1 P2 - C2 P2

U_OPTO_RX_A GND - U_OPTO_RX_B GND

U_RS232_A DIN2 - U_RS232_A RIN2

C1 P2 - C2 P2

GND

U_RS232_A DIN2 - U_RS232_A RIN2

C14

Capacitance

10µF

Resistance

1kΩ

C16

Capacitance

100nF

C19

Capacitance

100nF

Resistance

1kΩ

C20

Capacitance

100nF

R17

Resistance

4.7kΩ

Capacitance

100nF

J_SRC_A

Resistance

0Ω

R_ADC_LO_A

Resistance

10kΩ

Resistance

1kΩ

R11

Resistance

10kΩ

C12

Capacitance

18pF

Resistance

1kΩ

Resistance

1kΩ

R_RUN

Resistance

10kΩ

R_MODE_A

Resistance

10kΩ

C18

Capacitance

100nF

Resistance

1kΩ

Resistance

1kΩ

R12

Resistance

330Ω

R_CC2

Resistance

5.1kΩ

C15

Capacitance

10µF

C10

Capacitance

100nF

J_SRC_B

Resistance

0Ω

Capacitance

100nF

R_ADC_HI_A

Resistance

33kΩ

R_ADC_LO_B

Resistance

10kΩ

R_FB_HI

Resistance

1MΩ

C17

Capacitance

100nF

Capacitance

100nF

C13

Capacitance

10µF

R14

Resistance

3.3kΩ

Capacitance

100nF

C_XIN

Capacitance

18pF

Resistance

1kΩ

Capacitance

100nF

C_RS232_A1

Capacitance

100nF

C_RUN

Capacitance

100nF

Capacitance

100nF

Resistance

1kΩ

Capacitance

100nF

Capacitance

100nF

C_LDO_IN

Capacitance

10µF

C11

Capacitance

100nF

C21

Capacitance

100nF

R_ADC_HI_B

Resistance

33kΩ

R_FB_LO

Resistance

158kΩ

R15

Resistance

3.3kΩ

R16

Resistance

4.7kΩ

R_LED1

Resistance

1kΩ

C22

Capacitance

100nF

R10

Resistance

1kΩ

Capacitance

100nF

C_MCU1

Capacitance

100nF

R13

Resistance

330Ω

R_CC1

Resistance

5.1kΩ

U_RS232_B

LED1

LED_A_RX

U_RS232_A

TP2

TP5

U7_BUF

End of Life

LED_B_EGM

TP4

TP1

LED_A_EGM

TP3

LED_CABLE_A

LED_B_RX

U_OPTO_RX_A

LED_A_HOST

LED_HB

SW_SOFTBOOT

D_TVS_TX_B

LED_A_TX

D_TVS_RX_A

U_OPTO_RX_B

U_OPTO_TX_B

LED_B_TX

LED_B_HOST

D_BOOST

SW_RESET

D_TVS_TX_A

D_TVS_RX_B

U_OPTO_TX_A

Inductance

10µH

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Project Specification — RP2350 Dual-Port SAS USB Interface

Project Overview

Status: Draft. USB-C powered RP2350A board for dual independent SAS 9-bit serial ports used with casino gaming machines.

Intended Use

Prototype/production-intent interface board for development, diagnostics, host/responder emulation, and passive monitoring of two SAS ports.

What the Device Should Do

Enumerate over USB as a driverless vendor-class/WinUSB device.
Run RP2350 PIO-based 9-bit SAS serial on two independent ports.
Support host, EGM responder, and monitor modes per port.
Provide opto-isolated current-loop front-end as preferred population option and non-isolated RS-232 as alternate option.

Main Features

RP2350A QFN-60, external QSPI flash, 12 MHz crystal, SWD, BOOTSEL/reset controls.
USB-C 2.0 device input with CC pulldowns and USB data ESD.
+5V USB input, AP2112K 3.3V rail, TPS61040-derived 9V boost feeding VCC10 through Schottky OR.
Two Phoenix 4-pin SAS terminal connectors.
Per-port cable VCC ADC sense, status LEDs, mode straps, logic analyzer, SWD, and expansion headers.

System Architecture

Diagram

Hardware Subsystems

MCU: RP2350A with QSPI flash, crystal, reset/RUN/BOOTSEL, SWD.
USB: USB4105-GF-A USB-C receptacle, 5.1k CC pulldowns, USBLC6-2SC6 ESD array.
Power: AP2112K-3.3 for logic, TPS61040 boost to 9V, three 1N5817 Schottky sources to VCC10.
Front-ends: 6N139 optocouplers and SN7407 open-collector TX LED driver; MAX3232 RS-232 populate option per port.
Diagnostics: ADC dividers, cable live LEDs, firmware status LEDs, logic analyzer and expansion headers.

Interfaces and Connections

USB-C: VBUS, GND, D+, D-, CC1, CC2.
Port A/B screw terminal: Pin 1 GND, Pin 2 RX board-listens, Pin 3 TX board-transmits, Pin 4 cable VCC.
SWD: SWDIO, SWCLK, RUN/reset, 3V3, GND.
Logic analyzer: Port A/B TX/RX and GND.
Expansion: GPIO15–24 and GPIO28.

Power Tree and Power Budget

USB VBUS is +5V input and only host data link.
+3.3V from AP2112K-3.3 powers MCU, QSPI flash, logic-side front ends, transceivers, and LEDs.
VCC10 is supplied by diode-OR from Port A cable VCC, Port B cable VCC, or TPS61040 boost set to 9V.
Preliminary budget: RP2350 + flash + logic/front-end + LEDs expected within AP2112K 600mA if not all LEDs at high current; opto LED current is sourced from VCC10, not 3.3V.

Firmware-Relevant Hardware Requirements

Fixed GPIO map: GP0 A_TX, GP1 A_RX, GP2 A_TX_LED, GP3 A_RX_LED, GP4 A_HOST_LED, GP5 A_EGM_LED, GP6 B_TX, GP7 B_RX, GP8 B_TX_LED, GP9 B_RX_LED, GP10 B_HOST_LED, GP11 B_EGM_LED, GP12 mode strap A, GP13 mode strap B, GP14 reset/soft boot, GP25 heartbeat, GP26 ADC0 cable A VCC, GP27 ADC1 cable B VCC, GP15–24 and GP28 expansion.

Manufacturing and Assembly Expectations

SMD MCU and support circuitry; through-hole screw terminals for field wiring.
Populate options distinguish opto-isolated current-loop versus RS-232 front-end.
Use test points for +3V3, +5V, VCC10, boost switch-node, and GND.

Physical Design Expectations

Assumption: 4-layer rectangular PCB sized around the terminal blocks and USB-C connector, with USB at one edge and port A/B terminals at the opposite/front edge.

Important Design Decisions

Cable VCC dominates VCC10 when at or above 9V; boost supports bench mode only.
Opto interface is preferred and galvanically isolated; RS-232 option shares MCU pins and connector footprint as a non-isolated SKU.
Pin map is fixed by firmware and must not be reassigned.

Assumptions

USB-C operates as sink/device only; no USB PD.
4-layer stackup is selected because of USB routing, QFN MCU, switching boost, and mixed isolated/non-isolated field wiring.
RS-232 and opto population options should not be populated simultaneously on the same port unless explicitly reviewed.

Change Notes

Initial specification created from user-provided requirements.

Project Overview
Intended Use
What the Device Should Do
Main Features
System Architecture
Hardware Subsystems
Interfaces and Connections
Power Tree and Power Budget
Firmware-Relevant Hardware Requirements
Manufacturing and Assembly Expectations
Physical Design Expectations
Important Design Decisions
Assumptions
Change Notes

Reviews

Documents

Project Specification — RP2350 Dual-Port SAS USB Interface
Board Bring-Up Plan — RP2350 Dual-Port SAS USB Interface

Assets

Assets are files uploaded to this project which can be used in various ways.

Project Name

Description

USB-C powered RP2350 dual-port SAS interface board with opto-isolated current-loop and RS-232 populate-option front-ends.

Properties

Properties describe core aspects of the project.

Pricing & Availability

Distributor	Qty 1
Arrow	$6.89–$14.13
Digi-Key	$3.81–$4.37
HQonline	$4.28–$4.75
LCSC	$16.70–$18.38
Mouser	$16.41–$17.93
TME	$7.62
Verical	$9.44–$14.92

Controls

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