1-Key Keyboard Hardware Setup

Here are the QSPI flash connections between U1 and U2:

Table


NetConnections
CS#U2:CS#, U1:QSPI_CSN
DO (IO1)U2:DO, U1:QSPI_SD0
DI (IO0)U2:DI, U1:QSPI_SCLK
WP# (IO2)U2:WP#, U1:QSPI_SD2
HOLD# (IO3)U2:RESET, U1:QSPI_SD3
CLKU2:CLK, U1:QSPI_SCLK
VCCU2:VCC, U1:IOVDD
GNDU2:GND, U1:GND
Let me know if you’d like me to apply these wiring changes.
please configure this as the example in the datasheet
Which datasheet example would you like me to follow?
  • The RP2040’s reference design (power decoupling, reset pull-up, flash wiring, VBUS sense, etc.)
  • The W25Q32JV flash example circuit
  • The USB-C connector reference (CC pull-downs, VCONN, dead-battery path)
Or let me know if it’s another section—and I can assume you want the RP2040 reference design if that works.
RP2040’s reference design
I can add the five 100 nF capacitors to implement the RP2040 decoupling. They are:
Shall I apply this change?
U1
U2 DO_(IO1) - U1 QSPI_SD0
J3 V-BUS - U1 USB_VDD
U2 DO_(IO1) - U1 QSPI_SD0
Capacitance
100nF
U2 VCC - U1 IOVDD
J3 GND - U1 GND
Capacitance
100nF
U2 ~WP_(IO2) - U1 QSPI_SD2
U2 ~WP_(IO2) - U1 QSPI_SD2
U2 ~CS - U1 QSPI_CSN
Capacitance
100nF
U2 DI_(IO0) - U1 QSPI_SCLK
J3 GND - U1 GND
Capacitance
100nF
U2 DI_(IO0) - U1 QSPI_SCLK
U2 ~CS - U1 QSPI_CSN
U2 VCC - U1 IOVDD
J3 V-BUS - U1 USB_VDD
Capacitance
100nF
U2 DI_(IO0) - U1 QSPI_SCLK
U2 ~RESET_(IO3) - U1 QSPI_SD3
U2 ~RESET_(IO3) - U1 QSPI_SD3
J3 GND - U1 GND
Y1
C1
Capacitance
22pF
U3
Capacitance
10uF
R3
Resistance
5.1kΩ
R1
Resistance
10kΩ
R4
Resistance
5.1kΩ
C2
Capacitance
100nF
J3
R2
Resistance
22 Ω
U4
SW1
U2
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