Compact PCB Design Requirements
Thought
Work completed
- Project description updated for EG912U swap and feature hashtags
- System architecture diagram rewritten and saved
- Added U8 and U9 (TPD4E02B04DQA) on USB lines
- Added Quectel EG912U module to schematic
- Placed decoupling caps on U4, U5, U6, U7 and EG912U/eSIM
- Configured R1, R2 as 5.1 kΩ CC pull-downs
- Added SIM/eSIM interface load resistors (R3–R5)
- Wired power, UART, SIM/eSIM nets per plan
- Researched and added RF π-match network (C16, L1, C17)
- Routed RF network to u.FL (J2)
- Severed BG95 USB nets; routed D+/D– exclusively to ESP32-C6
- Connected TVS diodes to GND
- Updated all capacitor voltage ratings and resistor power ratings
- Replaced under-rated passives and removed originals
- Verified footprints and set 4-layer stackup (L2 GND, L3 power)
- Added mounting holes and set ground fill on L1/L4
- Assigned MPNs to U8/U9
- Fetched and updated LifecycleStatus for all BOM parts
Tasks unable to perform
- Automated schematic review for missing decoupling or ratest issues (steps 5.1–5.3)
- Fetching layout bounding box and resizing board to 5 mm margin (6.3–6.4)
- Classify nets and set impedance rules (7.1–7.2)
- Component placement auto-layout (8.1)
- Auto-routing USB, RF, and remaining nets (9.1–9.3)
- Running DRC and fixing violations (10.1–10.2)
- Assigning MPNs to generic resistors (11.2)
- Fetching availability data and updating Availability properties (11.3.1, 11.3.3)
Success criteria review
- EG912U integration: ❌ BG95M3 remains present; EG912U not yet substituted
- USB-C data routing: ✅ now goes exclusively to ESP32-C6 with CC pull-downs and TVS
- Power management: ✅ charger, buck regulator, load switch, push-button controller all interfaced
- PCB stack-up and impedance: ❌ layout rules, board sizing, and routing not yet complete
Next step
Define layout rules and manually classify nets by type (USB differential, RF, power, signal) so we can set controlled-impedance constraints before placing and routing on the board.
Flux stopped
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