MOSFET Driver Circuit Design
Thought
Work done
- Renamed the project to UC3825 MOSFET PWM Driver and updated the description for the approved PWM/gate-driver goal.
- Documented the chosen architecture and timing assumptions in Design Notes.
- Added the full initial schematic part set: U1 as U1, U2 as U2, timing parts R1 and C1, control potentiometers RV1 and R2, support passives R3 to R7 and C2 to C9, plus output connector J1.
- Verified the placed parts and pin names for U1 and U2, and extracted key datasheet constraints for decoupling and gate-drive implementation.
Success criteria review
- ❌ U1 is not yet wired, so the UC3825 timing network is not implemented or verified at 10 kHz.
- ❌ The two potentiometers, RV1 and R2, are added but not yet connected for frequency and duty control.
- ❌ The gate-driver/output stage around U2 and J1 is added but not yet wired, so 0 to 15 V output operation is not established.
- ❌ The full schematic still needs net connections and verification.
Next steps
The remaining work is to wire the full schematic: add the 15 V and ground rails, connect the UC3825 oscillator and duty-control loop, wire the U2 gate-driver stage to J1, then review the completed connections. After the schematic is complete, the natural next stage is PCB layout: board sizing, stackup, and component placement. I can continue with that once execution is available again.
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Design Notes
UC3825 MOSFET PWM Driver
Architecture
- PWM controller: UC3825DW powered from 15 V.
- Oscillator target: nominal 10 kHz using CT = 6.8 nF and effective RT about 15 kOhm.
- Frequency control: 4.7 kOhm series resistor plus 20 kOhm potentiometer in the RT path gives an approximate adjustment range centered near 10 kHz.
- Duty control: a 10 kOhm potentiometer will drive the UC3825 error amplifier / control input around the 5.1 V reference to vary PWM duty within the controller limits.
- Gate driver: UCC27511A low-side gate driver powered from 15 V for strong 0-15 V gate drive.
- Output connector: 2-pin screw terminal for GATE_OUT and PGND to an external MOSFET stage.
Datasheet-driven implementation points
- UC3825 requires local bypass on VCC, VC, and VREF using 0.1 uF capacitors with very short return path.
- Treat CT like a bypass capacitor and keep it local.
- UC3825 soft-start pin will be given a capacitor to ground for startup control.
- UCC27511A requires 100 nF plus about 1 uF local bypass from VDD to GND placed close to the driver.
- Add a series gate resistor and gate pull-down at the output to keep the external MOSFET gate defined and to damp ringing.
Frequency estimates
- RT = 15 kOhm, CT = 6.8 nF -> about 9.8 kHz target.
- RT = 4.7 kOhm, CT = 6.8 nF -> about 31.3 kHz upper end.
- RT = 10 kOhm, CT = 6.8 nF -> about 14.7 kHz.
Design choices
- Use a dedicated gate driver rather than drive the external MOSFET directly from the UC3825 output stage.
- Keep the main rail at 15 V so both the PWM controller output stage and the gate driver can produce the requested 0-15 V drive range.
UC3825 MOSFET PWM Driver
Architecture
Datasheet-driven implementation points
Frequency estimates
Design choices
