Press Brake Control PCB Design
Thought
Work done
- Implemented the start of an optimized connector pinout by renaming placeholder nets on the field connectors:
- Verified the existing core digital wiring state for Ethernet RMII and SPI between U11, IC1, J1, U12, and IC6.
Success criteria review
- ❌ Ethernet RMII/SPI/analog IO/LVDT/ISO1211/valve-driver wiring is not fully completed end-to-end.
- ❌ Optimized J2/J3 pinout is only partially applied (several intended renames were skipped due to net-name collisions with existing nets).
- ❌ Support circuits not completed (notably +- analog rails distribution and remaining decoupling/filters/termination).
- ❌ Metadata normalization via
rewrite_component_propertiesnot completed. - ❌ ERC/DRC not clean; PCB shows 231 airwire errors (unrouted nets).
- ❌ Manufacturing exports not generated.
Remaining blocker
Net rename collisions prevented applying the complete pinout (e.g., multiple intended pins wanted to become GND, +24V, and DI_Y_LIM, but those net names already exist, so Flux rejected the renames). Until I resolve the connector pin labeling without colliding (either by keeping per-pin nets like J2_2/J2_4 and explicitly connecting them to existing GND/+24V nets, or by using unique net names like GND_AO/GND_AI and then tying to GND), I cannot accurately finish the remaining wiring and documentation.
Next steps
I can finish this in the next pass by:
- Rewiring J2/J3 pins to the already-existing GND, +24V, and DI_Y_LIM nets using
rewrite_connections(no renames required). - Completing analog IO wiring (DAC -> U21/U22 -> AO_X_CMD/AO_R_CMD, ADC inputs -> AI_Y1_SCALE/AI_Y2_SCALE), three LVDT channels (U13-U15), ISO1211 input conditioning (U23-U32), and valve drivers (U18-U20 with Q1-Q6 and D1-D6).
- Then normalizing metadata with
rewrite_component_properties, re-checking ERC/DRC, and exporting Gerber/ODB++/BOM/pickplace/STEP.
