PCB Design for Fog Generator
Worked
Stopped by execution credits before I could finish the full schematic update or run ERC.
Completed so far:
- Removed obsolete 14 V parallel ideal-diode mux parts: U10/U11, Q10/Q11, C1/C2, R1–R4.
- Removed old TPS563200 17 V buck section: U3, L1, C5–C9, R5–R7.
- Removed old pump MOSFET driver and 2-pin pump connector: Q2, R16, R17, D2, J4.
- Renamed global power nets:
+14V_BUS→+28V_BUS+14V_MUX→+28V_OR_PRE_FUSEVBAT_A_IN→VBAT_SERIES_INPUMP_PWM→STEPPER_STEP
- Added main new 28 V architecture parts:
- U_BB LM5175PWPT buck-boost controller
- U3 TPS54561DPRT wide-VIN 3.3 V buck regulator
- J12 logical 6-pin LEMO input connector
- J4 5-pin JST-XH stepper pump connector
- U_DIODE_1/U_DIODE_2 LM74700-Q1 ideal-diode OR controllers
- Q_DIODE_1/Q_DIODE_2/Q_BB1–Q_BB4 using TSM170N06CP_ROG 60 V / 38 A MOSFETs as library substitutes because FDP18N40 was not found
- L_BB 47 µH / 15 A generic inductor placeholder
- Added and partially wired:
- LEMO input filter caps
- LM5175 bootstrap, soft-start, compensation, RT, UVLO, and feedback passives
- LM74700 1 µF VCAP bypass caps and gate networks
- TPS54561 input/output caps, bootstrap cap, feedback divider, EN/UVLO, SS, RT, and compensation placeholders
- Stepper connector pins for
+28V_BUS,GND,STEPPER_STEP,STEPPER_DIR,STEPPER_ENABLE
- Updated existing metadata:
- C3 to 4700 µF / 50 V bulk
- C4 to 50 V HF bypass
- F1 marked 25 A / 50 V minimum requirement
- J3 heater label/role updated for 28 V 200 W
- Q1 metadata updated to the 60 V MOSFET substitute
Important unresolved items:
- ERC has not been run after these edits.
- LM5175 datasheet correction: LM5175 VIN max is 42 V, not 60 V. It may still work for a 28 V system, but it is not a 60 V input controller.
- The exact LEMO EGG.1B.306 library footprint was not found; J12 is currently a logical 6-pin connector placeholder.
- The LM5175 current-sense implementation is only placeholder-wired; the proper high-power current-sense resistor/network still needs detailed design.
- INA226 monitor wiring is not fully resolved after the architecture change; U6B/R21 are still in an intermediate/orphaned state and need reconnection to the intended +28 V measurement point.
- PCB layout is now invalid for this revised architecture and will need a fresh placement/routing pass after the schematic is cleaned.
Clean unresolved issues
Run ERC/DRC
Find 60V controller
Find LEMO footprint
Design current sense
Refine this doc
Ask about this doc
Power Input Design Notes
Block Added
Dual V-mount battery ideal-diode mux and fused 14 V distribution entry.
Nets
VBAT_A_IN: V-mount battery A positive inputVBAT_B_IN: V-mount battery B positive input+14V_MUX: internal pre-fuse output from the two ideal-diode MOSFET drains+14V_BUS: fused 14 V load distribution busGND: common ground reference
Ideal-Diode Controller
Selected TI
LM74700QDBVTQ1 in SOT-23-6 for each input. Datasheet pin/application notes used:- ANODE connects to input source / external MOSFET source.
- CATHODE connects to output / external MOSFET drain.
- EN can be tied to ANODE for always-on operation.
- GATE drives the external N-channel MOSFET gate.
- VCAP charge-pump capacitor connects from VCAP to ANODE. Datasheet minimum is 0.1 uF; design uses the requested 1 uF MLCC.
Pass MOSFET
Selected
FDP8030L N-channel MOSFET instead of the example AOT240L because the available AOT240L library part is 6 mOhm typical, while FDP8030L meets the stated under-5 mOhm requirement:- VDS = 30 V
- ID = 80 A continuous
- RDS(on) = 3.5 mOhm at VGS = 10 V
- RDS(on) = 4.5 mOhm at VGS = 4.5 V
Fuse and Bus Capacitors
- Main fuse holder:
178.6764.0001MINI blade fuse holder, used as F1, annotated for 25 A main fuse service. - Bulk capacitor: 4700 uF / 35 V electrolytic on fused
+14V_BUSto GND. - HF capacitor: 1 uF / 35 V MLCC in parallel with bulk capacitor.
Current Sizing Rationale
Known major load: 200 W heater.
- At 14.4 V nominal: I = 200 W / 14.4 V = 13.9 A
- At 12.0 V depleted operating point: I = 200 W / 12.0 V = 16.7 A The 25 A fuse leaves margin for pump, fan, control electronics, and startup transients. MOSFETs are rated far above this current; final PCB layout must use very wide copper pours/planes and thermal copper for the high-current path.
Implementation Note
The schematic uses internal net
+14V_MUX before F1 so the fuse is truly in series. The user-facing load distribution rail remains +14V_BUS after the fuse, with the bulk and MLCC capacitors connected there.3.3 V Buck Regulator Block
Added a TI
TPS563200DDCR synchronous buck regulator to generate the global +3V3 logic rail from fused +14V_BUS.Nets
+14V_BUS: regulator input supply, nominal 14.4 V, expected 10-17 V range+3V3: regulated MCU / logic railGND: common ground reference+3V3_FB: feedback divider midpoint to FB pin
Datasheet-Grounded External Components
- Input capacitor: 10 uF MLCC from VIN to GND
- HF input bypass: 0.1 uF MLCC from VIN to GND
- Inductor: 10 uH shielded SMD inductor, 3 A saturation-current target
- Output capacitor: 22 uF MLCC from
+3V3to GND - HF output bypass: 0.1 uF MLCC from
+3V3to GND - Bootstrap capacitor: 0.1 uF from VBST to SW
- EN pull-up: 100 kOhm from EN to VIN /
+14V_BUSfor always-on operation - Rail indicator: green LED with 1 kOhm current-limiting resistor from
+3V3to GND
Feedback Calculation
The TPS563200 feedback reference is 0.768 V. Output voltage follows:
VOUT = VREF * (1 + Rtop / Rbottom)Chosen divider:
- Rtop = 16.5 kOhm from
+3V3to FB - Rbottom = 4.99 kOhm from FB to GND
Result:
VOUT = 0.768 * (1 + 16.5 / 4.99) = 3.31 VThis is within normal tolerance for a 3.3 V logic rail and uses standard resistor values.
Validation
Schematic/ERC review after adding the buck block reported no open issues for this block.
Heater MOSFET Driver Block
Added the 200 W heater switching and safety/current-sense path.
Topology
Implemented as a low-side N-MOSFET switch so the ESP32 can drive the gate directly through a series resistor:
+14V_BUS -> F2 external thermal cutoff connector -> J3 pin 1 -> heater load -> J3 pin 2 / HEATER_SW -> Q1 drain -> Q1 source / HEATER_SHUNT_HI -> R15 5 mOhm shunt -> GNDThe shunt low side is the global
GND net and should be treated as HEATER_SHUNT_LO for the later INA226 Kelvin sense connection.Components
- Q1:
FDP8030LN-channel MOSFET used for the heater switch. It was selected over the example AOT240L because the library AOT240L result did not meet the requested under-5 mOhm RDS(on) target, while FDP8030L is 30 V / 80 A with 3.5 mOhm max at VGS = 10 V. - R13: 10 Ohm series gate resistor from
HEATER_PWMto Q1 gate. - R14: 10 kOhm gate pulldown from Q1 gate to GND.
- C13: 100 nF / 35 V MLCC across Q1 drain-source for HF snubbing.
- F2: 2-pin screw-terminal placeholder for the external Microtemp 290 degC one-shot thermal cutoff, in series with heater positive.
- J3: 2-position 5.0 mm screw terminal rated 15 A / 300 V for heater wiring.
- R15: 5 mOhm, 2512 current shunt in the MOSFET source return path. At 14 A it develops about 70 mV and dissipates about 0.98 W, so use Bourns CSS2H-2512 or equivalent high-current shunt.
Designator Cleanup
Existing ideal-diode MOSFETs were renamed from Q1/Q2 to Q10/Q11 so Q1 could be used for the heater switch as requested.
Validation
Electrical-rule review after wiring reported no open ERROR/WARNING/OPEN ERC items.
Dual INA226 Battery Telemetry Block
Added two TI
INA226AIDGSR I2C current/voltage monitors so battery A and battery B can be measured independently before the ideal-diode mux.Datasheet Notes
INA226
VS operates from 2.7 V to 5.5 V, while the monitored bus/input pins can measure up to 36 V independent of the logic supply. The datasheet recommends a 0.1 uF bypass capacitor close to VS/GND and Kelvin/4-wire routing from IN+ and IN- to the shunt resistor.Battery A Monitor
- U6A:
INA226AIDGSR, I2C address 0x40 with A1=GND and A0=GND. - R20: 5 mOhm 2512 shunt inserted between external
VBAT_A_INand new internalVBAT_A_IDEAL_INfeeding U10/Q10. - U6A IN+ and VBUS connect to external
VBAT_A_INside of the shunt. - U6A IN- connects to
VBAT_A_IDEAL_IN, the load/ideal-diode side of the shunt. - C17 10 uF and C18 0.1 uF decouple U6A VS to GND.
Battery B Monitor
- U6B:
INA226AIDGSR, I2C address 0x41 with A1=GND and A0=+3V3. - R21: 5 mOhm 2512 shunt inserted between external
VBAT_B_INand new internalVBAT_B_IDEAL_INfeeding U11/Q11. - U6B IN+ and VBUS connect to external
VBAT_B_INside of the shunt. - U6B IN- connects to
VBAT_B_IDEAL_IN, the load/ideal-diode side of the shunt. - C19 10 uF and C20 0.1 uF decouple U6B VS to GND.
I2C Bus
- SDA: ESP32 GPIO16 /
I2C_SDA, with R22 4.7 kOhm pull-up to +3V3. - SCL: ESP32 GPIO17 /
I2C_SCL, with R23 4.7 kOhm pull-up to +3V3. - ALERT pins are unused and marked no-connect.
Current Sizing
The 5 mOhm battery shunts drop 70 mV at 14 A and dissipate about 0.98 W at 14 A. At a 25 A fault/maximum design current they dissipate 3.125 W, so the final BOM/layout should use a high-current 2512 shunt with adequate power rating and copper area, and route INA226 IN+/IN- as Kelvin sense traces.
Validation
Electrical-rule review after wiring reported no open ERROR/WARNING/OPEN ERC items.
MAX31855 K-Type Thermocouple Amplifier Block
Added the K-type thermocouple measurement front end using
MAX31855KASA+ as U4.Datasheet Pinout Note
The Analog Devices/MAXIM datasheet pinout for MAX31855 SOIC-8 is: pin 1 GND, pin 2 T-, pin 3 T+, pin 4 VCC, pin 5 SCK, pin 6 CS, pin 7 SO, pin 8 DNC. The schematic is wired by pin name according to this datasheet pinout, which differs from the pin numbering in the user prompt.
Connections
- U4 VCC to
+3V3; U4 GND toGND. - C14 10 uF and C15 0.1 uF from U4 VCC to GND, placed close to U4. The datasheet specifically recommends a 0.1 uF ceramic bypass close to VCC/GND.
- SPI read-only interface: SCK to ESP32 GPIO14 /
SPI_SCK, SO to ESP32 GPIO13 /SPI_MISO, CS to ESP32 GPIO15 /SPI_CS_MAX31855. MAX31855 has no MOSI connection. - J6 pin 1 is
TC_POS/ yellow K-type positive; J6 pin 2 isTC_NEG/ red K-type negative. - R18 10 kOhm series resistor from
TC_POSto filtered U4 T+ nodeTC_POS_FILT. - R19 10 kOhm series resistor from
TC_NEGto filtered U4 T- nodeTC_NEG_FILT. - C16 10 nF differential capacitor across
TC_POS_FILTandTC_NEG_FILT, matching the datasheet noise recommendation to place a 10 nF ceramic across T+ and T- pins. - U4 DNC is marked no-connect.
Designator Cleanup
The prior LM74700 ideal-diode controllers were renamed from U4/U5 to U10/U11 so U4 could be assigned to the MAX31855 as requested.
Validation
Electrical-rule review after wiring reported no open ERROR/WARNING/OPEN ERC items. Thermocouple nets are annotated as analog and SPI nets as medium-speed.
Pump MOSFET Driver Block
Added the small DC gear pump low-side PWM switch for the approximately 3 W pump load.
Topology
+14V_BUS -> J4 pin 1 -> pump load -> J4 pin 2 / PUMP_SW -> Q2 drain -> Q2 source -> GNDThe flyback diode is wired reverse-biased across the pump load, with cathode on
+14V_BUS and anode on PUMP_SW, so inductive current recirculates safely when Q2 turns off.Components
- Q2:
AO3400ASOT-23 N-channel MOSFET, 30 V VDS and 5.7 A continuous rating. This is comfortably oversized for the nominal 250 mA pump load. - R16: 100 Ohm series gate resistor from
PUMP_PWM/ ESP32 IO5 to Q2 gate. - R17: 10 kOhm gate pulldown from Q2 gate to GND.
- D2:
1N4007G1 A rectifier diode used as the pump flyback diode. - J4:
B2B-XH-AM(LF)(SN)2-pin JST-XH connector; pin 1 is+14V_BUS, pin 2 isPUMP_SW.
Current Sizing
Pump load: 3 W at 12 V = 0.25 A nominal.
PUMP_SW is annotated for 0.25 A. Q2 and D2 ratings provide substantial margin; final layout should still keep the pump loop compact to reduce EMI.Validation
Electrical-rule review after wiring reported no open ERROR/WARNING/OPEN ERC items.
Block Added
Nets
Ideal-Diode Controller
Pass MOSFET
Fuse and Bus Capacitors
Current Sizing Rationale
Implementation Note
3.3 V Buck Regulator Block
Nets
Datasheet-Grounded External Components
Feedback Calculation
Validation
Heater MOSFET Driver Block
Topology
Components
Designator Cleanup
Validation
Dual INA226 Battery Telemetry Block
Datasheet Notes
Battery A Monitor
Battery B Monitor
I2C Bus
Current Sizing
Validation
MAX31855 K-Type Thermocouple Amplifier Block
Datasheet Pinout Note
Connections
Designator Cleanup
Validation
Pump MOSFET Driver Block
Topology
Components
Current Sizing
Validation
