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U1
J6
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Q2
End of Life
Q1
J5
R2
Resistance
1kΩ
D1
R6
Resistance
1kΩ
R5
Resistance
10kΩ
SW2
R4
Resistance
1kΩ
LED2
R3
Resistance
1kΩ
SW1
K1
LED1
PS1
J7
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Documents
Documents are markdown text files which describe project goals, capture details, or even simulation outputs.
Assets
nv_logo.svg
nv_logoDefault
2-layer-thumb.png
2-layer-thumbThumbnail[2-layer] JLCPCB Constraints 7f13
![[2-layer] JLCPCB Constraints 7f13 thumbnail](https://img-cdn.flux.ai/eyJidWNrZXQiOiJncmF2aXRvbi1lbGVjdHJpYy1zeW1ib2xzIiwia2V5IjoiZG9jdW1lbnRfYXNzZXRzLzItbGF5ZXItdGh1bWItYzk4NzE0NGEtNTg0Ni00MzEyLTlkNDktNjBlZmM2N2FiMDk3LnBuZyIsImVkaXRzIjp7InJlc2l6ZSI6eyJ3aWR0aCI6MTM2LCJoZWlnaHQiOjEzNiwiZml0IjoiY29udGFpbiIsImJhY2tncm91bmQiOnsiciI6MCwiZyI6MCwiYiI6MCwiYWxwaGEiOjB9fX0sIm91dHB1dEZvcm1hdCI6IndlYnAifQ==)
Use this template if you're planning to get your 1 to 2-layer board manufactured in JLCPCB. It has the via min/max and trace width constraints already baked as global rules. #project-template #template #manufacturer-design-rules
Properties
Pricing & Availability
DPN | Stock | Qty 1 |
|---|---|---|
1 | 0 | $0.00 |
1 | 0 | $0.9487 |
1 | 7 | $1.14 |
1 | 0 | $0.00 |
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