I’ll research the MP28301GG-P datasheet and authoritative sourcing information, then create the application guide with verified pin connections, layout guidance, and clearly labeled alternatives.
I verified the main application details, including the 100–500 kΩ power-good pull-up and the LDO’s dependency on VIN1. The datasheet also has ambiguous CTRL-pin guidance; I’ll flag it explicitly rather than assume that lower-voltage GPIO drive is safe.
The Monolithic Power Systems MP28301 integrates a step-down switching regulator rated for up to 700 mA and a 100 mA low-dropout regulator, with advertised quiescent currents of 500 nA and 300 nA respectively. Its low standby consumption makes it suitable for battery-powered electronics needing an efficient main rail and a separate linear-regulated rail.
Scope: practical MP28301GG-P schematic integration and PCB layout. Research date: October 6, 2026. The technical basis is the manufacturer-authored MP28301 datasheet, Rev. 1.1, dated 6/12/2019. The manufacturer’s online viewer was inaccessible to automated PDF retrieval; technical evi...
Created and checked the MP28301GG-P Application and Usage Guide, covering all seven requested sections with datasheet citations and source links. It flags ambiguous CTRL-pin guidance, unverified package pitch and purchasing details, and labels alternatives as redesign options—not drop-in replacements. Before production use, prioritize resolving the CTRL interface ambiguity and confirming the package drawing and ordering suffix.
The Monolithic Power Systems MP28301 integrates a step-down switching regulator rated for up to 700 mA and a 100 mA low-dropout regulator, with advertised quiescent currents of 500 nA and 300 nA respectively. Its low standby consumption makes it suitable for battery-powered electronics needing an efficient main rail and a separate linear-regulated rail.
Scope: practical MP28301GG-P schematic integration and PCB layout. Research date: October 6, 2026. The technical basis is the manufacturer-authored MP28301 datasheet, Rev. 1.1, dated 6/12/2019. The manufacturer’s online viewer was inaccessible to automated PDF retrieval; technical evidence was obtained from an accessible mirror of that manufacturer document. This guide does not certify the current project symbol, footprint, or 3D model.
1. Quick Specifications
Table
Parameter
Classification
Value and conditions
VIN1 and VIN2 supply voltage
Recommended operating conditions
2.0–5.5 V. LDO operation also requires VIN1 above its UVLO threshold.
Operating junction temperature
Recommended operating conditions
−40°C to +125°C; this is junction, not ambient, temperature.
Buck output current
Functional capability, not an absolute-maximum stress rating
Up to 700 mA.
LDO output current
Functional capability, not an absolute-maximum stress rating
Up to 100 mA.
Buck / LDO quiescent current
Advertised nominal values, not guaranteed maxima
500 nA / 300 nA; do not use these alone as a complete system standby-current budget.
Buck selectable output voltages
Control-selected operating settings
0.8, 1.0, 1.2, 1.5, 1.8, 2.5, or 3.3 V.
LDO selectable output voltages
Control-selected operating settings
1.2, 2.5, or 3.0 V.
VIN1 / VIN2 supply voltage
Absolute maximum
6 V; not a recommended operating voltage.
Other pins, excluding SW
Absolute maximum
−0.3 V to +6 V.
SW voltage
Absolute maximum
−0.3 V to +6 V continuously; specified brief excursions are −5 V for <10 ns, +8 V for <10 ns, and +10 V for <3 ns. These are stress limits, not design targets.
Junction temperature
Absolute maximum
+150°C.
Storage temperature
Absolute-maximum table
−65°C to +150°C.
Continuous power dissipation
Absolute maximum, conditional
1.6 W at TA = +25°C; allowable dissipation changes with ambient temperature and thermal implementation.
Package
Mechanical / ordering information
QFN-12, nominal 2 mm × 2 mm.
Terminal pitch
Unverified
Numeric pitch could not be validated from the package drawing. Check the original package drawing before footprint creation or release.
Absolute maximum ratings do not establish guaranteed functional operation. Keep the complete supply waveform, including overshoot, within the recommended range in normal use.
2. Pinout & Connections
Pin numbering and functions below follow the datasheet PIN FUNCTIONS table.
Table
Pin Number
Pin Name
Description
Best Practice
1
OUT1
Buck output-voltage sense input
Connect to the regulated node after the inductor, shared with the load and output capacitor. Do not connect directly to SW.
2
CTRL1
Buck voltage-selection / on-off control
Drive or strap to a defined state; do not float. Use the truth table below.
3
CTRL2
Buck voltage-selection / on-off control
Drive or strap to a defined state; do not float.
4
CTRL3
Buck voltage-selection / on-off control
Drive or strap to a defined state; do not float.
5
CTRL4
LDO voltage-selection / on-off control
Drive or strap to a defined state; do not float.
6
CTRL5
LDO voltage-selection / on-off control
Drive or strap to a defined state; do not float.
7
PG1
Open-drain buck power-good output
If monitored, add a 100–500 kΩ pull-up; 100 kΩ is an example within that range. Confirm the receiving input tolerates the pull-up rail.
8
GND
Ground
Connect to the common ground plane and local capacitor returns.
9
SW
Buck switching node
Connect to one terminal of the buck inductor. Keep this node compact.
10
VIN1
Buck supply input
Connect to the input supply and local input capacitor.
11
VIN2
LDO supply input
Connect to the intended LDO supply with local decoupling; supplying VIN2 alone does not remove the VIN1 dependency.
12
OUT2
LDO output
Connect to the LDO load and bypass to GND with 1 µF.
Output-voltage selection
Use the manufacturer’s column order CTRL3, CTRL2, CTRL1 to avoid reversing the selection bits.
Table
CTRL3
CTRL2
CTRL1
OUT1
0
0
0
Disabled
0
0
1
0.8 V
0
1
0
1.0 V
0
1
1
1.2 V
1
0
0
1.5 V
1
0
1
1.8 V
1
1
0
2.5 V
1
1
1
3.3 V
The LDO selection table is:
Table
CTRL5
CTRL4
OUT2
0
0
Disabled
0
1
1.2 V
1
0
2.5 V
1
1
3.0 V
CTRL interface ambiguity: the electrical-characteristics table specifies logic high at ≥1.2 V and logic low at ≤0.4 V. However, the pin descriptions additionally say that the CTRL voltage must not be lower than VIN1 for buck controls or VIN2 for LDO controls when used, while also directing unused controls to GND. For a fixed-output design, strap selected high bits to their associated input supply and low bits to GND; obtain MPS clarification before assuming that a lower-voltage MCU GPIO can directly provide the high level under all supply and sequencing conditions. No mandatory CTRL pull-up resistor value has been verified.
3. Standard Application Circuit
A practical reference configuration uses a 3.6 V input supply, a 1.8 V buck rail, and a 1.2 V LDO rail. The datasheet reference buck uses 10 µF input capacitance, a 2.2 µH inductor, and 10 µF output capacitance. Its LDO input uses 1 µF, and the OUT2 pin description calls for a 1 µF output bypass capacitor.
Input and ground: connect the example input source to VIN1 and VIN2; connect GND to the common return. Place 10 µF from VIN1 to GND and 1 µF from VIN2 to GND directly at the IC. Separate local capacitors remain useful even when the two supply pins share a source.
Buck power path: connect SW → 2.2 µH inductor → regulated buck output. Connect this output to OUT1 and the buck load; place 10 µF from this node to GND. OUT1 is the sense connection, not the switched power source.
LDO path: connect OUT2 to the LDO load and place 1 µF from OUT2 to GND.
Fixed output straps: for 1.8 V buck operation, set CTRL3=1, CTRL2=0, CTRL1=1; for 1.2 V LDO operation, set CTRL5=0, CTRL4=1. Apply the CTRL interface caution above. There is no external feedback divider in this control-selected example.
Power-good monitoring: add a 100–500 kΩ PG1 pull-up if needed. The datasheet allows a VIN pull-up, or a CTRL pull-up only when that CTRL voltage is not dynamically adjusted. If pulling to VIN, ensure the MCU input is voltage-compatible; do not expose an unprotected low-voltage GPIO to the battery rail.
Passive selection and operating checks
Inductor: the datasheet recommends 1–2.2 µH with DC resistance below 200 mΩ. Engineering recommendation: check RMS heating and saturation over temperature against the calculated peak current, not merely the 700 mA output rating. The datasheet gives IL(MAX) = ILOAD + ΔIL/2, but no universal inductor saturation-current rating was verified.
Capacitors: input-capacitor guidance specifies X5R/X7R, while the buck output guidance calls for low impedance at the switching frequency and says 10 µF is sufficient for most applications. Engineering recommendation: select voltage ratings with supply-transient margin and verify effective capacitance under DC bias, temperature, and tolerance. Nominal capacitance alone is insufficient.
Headroom: a buck converter does not boost, and an LDO needs input-output headroom. Selecting a voltage code does not guarantee that voltage when its input is too low. Validate regulation at the minimum battery voltage and maximum load.
VIN dependency: VIN1 must remain above UVLO even if the buck output is disabled and only the LDO is wanted. The buck UVLO rising threshold is 1.65 V minimum, 1.8 V typical, and 1.95 V maximum. Use the recommended 2.0 V minimum input for normal operation, not the typical UVLO value.
4. PCB Layout & Routing Guidelines
The following combines verified manufacturer guidance with explicitly identified general engineering recommendations; no universal trace width or thermal-via pattern is claimed.
Local decoupling: place CIN1 close to VIN1 and GND, minimizing the input-current loop. This is explicit manufacturer layout guidance. Keep VIN2 and OUT2 bypass capacitors close to their pins as well.
Switch-node containment — engineering recommendation: place the inductor beside SW and minimize switched copper area; do not run OUT1 sensing, CTRL, or sensitive analog signals beside or beneath unnecessary SW copper.
Output sensing — engineering recommendation: take OUT1 from the regulated output at the output capacitor using a quiet sense connection rather than a long segment shared with high-current load return routing. Keep the output capacitor, inductor, and IC ground-return geometry compact.
Current paths — engineering recommendation: use short, broad VIN1, SW-to-inductor, buck-output, and ground paths. Size copper and vias for actual current, copper thickness, permissible temperature rise, and voltage drop; no fixed width can be justified without the board stackup. Avoid narrow thermal-relief spokes that become power-loop bottlenecks, while checking solderability with the assembler. Differential-pair routing is not applicable to this regulator.
Thermal implementation — engineering recommendation: provide useful ground copper and check combined buck loss plus LDO loss; approximate the LDO contribution as (VIN2 − VOUT2) × IOUT2. Verify junction temperature at worst-case ambient. Do not invent a central exposed-pad connection or via array: confirm the original package drawing and land pattern first. The conditional 1.6 W rating is not a guaranteed dissipation budget for every PCB.
5. Common Pitfalls / Things to Watch Out For
Treating CTRL pins as ordinary enables or leaving them floating. They also select voltage. Reversing CTRL1/CTRL3 changes the selected output; all-zero disables the respective regulator. Use the exact truth table and defined startup states, and resolve the high-level voltage ambiguity before direct GPIO control.
Assuming the LDO is independent of VIN1. An energized VIN2 alone does not satisfy the documented operating condition: VIN1 must exceed UVLO. This matters during battery isolation, rail sequencing, and low-power modes.
6. Popular Alternatives & Equivalents
No cross-manufacturer drop-in replacement was verified. The two manufacturer-listed PMICs below are functionally similar redesign options, not pin-compatible or footprint-compatible substitutions. Popularity and current stock were not independently established. Neither should be assumed to preserve the MP28301’s nanoamp standby behavior.
The official product page describes integrated buck regulators and an LDO in a different, larger package.
Functionally similar only. Not pin-compatible or footprint-compatible. Requires schematic, footprint, passive, output-setting, sequencing, and standby-budget redesign. The additional buck channel is not needed for a simple two-rail replacement.
The official product page describes an integrated multirail PMIC containing buck converters and LDOs.
Functionally similar only. Not pin-compatible or footprint-compatible. Intended for a more complex multirail subsystem; requires board redesign and requalification of input range, voltage selection, current capability, and low-power behavior.
Verification boundary: the functional descriptions above are supported by the linked manufacturer product pages. Citation-backed extraction of the alternative datasheets remained pending after retries, so exact replacement ratings and suitability across the MP28301 operating envelope are not established here. No verified drop-in exists to hyperlink in the Flux library; no library availability is claimed for these redesign candidates. For a nanoamp standby target, also consider a separate ultra-low-IQ buck and LDO solution, qualified as a new architecture rather than a substitution.
7. Sourcing & Purchasing Guide
Table
Attribute
Details
Primary Distributors
Start with MPS direct or an MPS-confirmed franchised distributor. DigiKey, Mouser, Arrow, and LCSC are channels to check, not verified in-stock suppliers for this exact code in this research. An exact MP28301GG-P assembly listing was found at JLCPCB, C6674655; its page states purchased components are for future assembly orders and cannot be shipped separately.
Packaging Options
The reviewed datasheet explicitly defines MP28301GG-Z as tape-and-reel. The JLCPCB MP28301GG-P listing reports a 500-piece full reel. Manufacturer confirmation of the precise -P versus -Z packaging distinction was not obtained; do not assume the suffixes are interchangeable on a purchase order. Cut-tape availability for this exact code is unverified.
Standard MOQ
Not verified as a universal manufacturer/distributor MOQ. The JLCPCB listing reports full reel = 500, which is a pack quantity, not proof of a 500-piece minimum order everywhere. A 1-piece cut-tape MOQ and the -Z reel quantity were not verified. Obtain a written quote.
Sourcing Advice
Prefer MPS direct or confirmed authorized distributors; avoid untraceable marketplace stock because of counterfeit and remarking risk. Match the full ordering code, QFN-12 package, reel quantity, moisture handling, and packing type to the BOM and assembler’s requirements. Do not infer electrical behavior from aggregator entries that describe the part as merely an “adjustable buck”: the manufacturer document specifies an integrated buck plus LDO with discrete CTRL-selected outputs.
Stock, price, lead time, and authorization are not guaranteed by the presence of a web listing. Reconfirm these at purchase; this guide does not provide a live procurement quote.
Sources
Monolithic Power Systems, MP28301 datasheet, Rev. 1.1, dated 6/12/2019. Manufacturer datasheet viewer. Manufacturer-authored content was read through an accessible Ampheo-hosted mirror because the manufacturer viewer did not return a downloadable PDF. Relevant sections: Ordering Information; Absolute Maximum Ratings; Recommended Operating Conditions; Electrical Characteristics; Pin Functions; Table 1 CTRL vs Output Voltages; Application Information; PCB Layout; Typical Application Circuits; Package Information.
Analog Devices, ADP5023 official product page — functional redesign candidate only. The page lists a Rev. F datasheet; exact alternative-datasheet extraction remained pending.
Texas Instruments, TPS650250 official product page — functional redesign candidate only. The page lists the Rev. B datasheet dated May 18, 2018; exact alternative-datasheet extraction remained pending.
JLCPCB, MP28301GG-P / C6674655 listing — first-party evidence for that provider’s assembly-only purchasing restriction and reported 500-piece reel. Not a source for regulator electrical design limits.
Items not verified: numerical package pitch; manufacturer-defined -P packaging semantics; universal MOQ; current franchised-distributor inventory; cross-manufacturer drop-in equivalence; and safe direct lower-voltage GPIO drive under the ambiguous CTRL wording. Resolve the applicable items before production release.