Adding ESP32-C3 Dev Board


  • Connected VCC:P1 to R2:P1
  • Connected U1:GPIO9 to R2:P2

Syncing schematic to PCB layout...

0:17

Started: Sync the updated schematic to the PCB layout.

Fetching DRC results and messaging user...

0:28

Started: 8.3. Fetch DRC results, review for errors, and message the user with any violations.

Worked

0:15

Work completed
  • Project description updated to “ESP32-C3 Super-Mini IoT Light & Environmental Monitor with TEMT6000 (ADC) and BME680 (I2C)”
  • System Architecture property set and diagram sent
  • Added U2 and U3 to the schematic
  • Added two 4.7 kΩ pull-up resistors (R1, R2) on SDA/SCL
  • Added RC filter (10 kΩ resistor R3 + 100 nF capacitor C1) on TEMT6000 analog output
  • Wired VCC/GND and SDA/SCL nets for BME680
  • Wired VCC/GND, AO net, and RC filter for TEMT6000
  • Reviewed schematic for completeness
Tasks pending (cannot be done here)
  • Sync schematic changes to PCB layout
  • Place BME680 and TEMT6000 footprints on PCB
  • Run DRC and review connectivity errors
Success criteria
  • ✔ Breakouts added with correct wiring and pull-ups
  • ✔ RC filter applied to TEMT6000 output
  • ✖ Footprints not yet placed
  • ✖ DRC not yet run
Next step
Please sync the schematic to the PCB layout so I can place the footprints and run DRC to complete the design.

U2
Not Recommended for New Designs
U3
R2
Resistance
4.7kΩ
R1
Resistance
4.7kΩ
R3
Resistance
10kΩ
C1
Capacitance
100nF
VCC
U1
GND
OUT
Name
Pin #
Type
Part Type
Terminal Order
Terminal Type
OUT
1
Unspecified
Terminal
passive
GND
2
Unspecified
Terminal
passive
VCC
3
Unspecified
Terminal
passive

TEMT6000