The correction-and-routing executor was launched with placement locked and the required sequence: fix U1’s TPS259470 footprint, clear its duplicate-pad DRC errors, then selectively route the protected 5 V, 3.3 V, USB, and LED-current nets.
Open items
The executor has not produced a completed report.
I cannot confirm whether any footprint or routing mutations landed.
Fresh DRC, USB pair matching, and connectivity verification remain outstanding.
Execution is paused because no ACUs remain.
No routing result should be treated as verified until the executor report and live board are reconciled after ACUs are restored.
Received notification from "TPS259470 Footprint Routing" that it finished — picking the work back up.
Bench/phantom prototype only. Not for patient contact, diagnosis, or clinical use.
Final V1 architecture
Raspberry Pi 5 and IMX296 camera are external and separately powered; the camera connects directly to the Pi over MIPI CSI.
The control board uses a dedicated USB-C 5 V inlet and a separate self-powered USB-C native-data port.
Main controller is ESP32-S3-WROOM-1-N16R8.
On-board ICM-42688-P uses SPI; the remote connector shares clock/data but has an independent chip select.
External VL53L5CX-SATEL-compatible carrier uses 3.3 V, GND, I2C, INT and LPn.
One removable white LED branch is driven at 250 mA.
Power tree
Diagram
USB decisions
J1's 5.1 kΩ Rd network only identifies a Type-C sink. The required source is explicitly a dedicated 5 V/3 A USB-C supply/cable maintaining at least 4.75 V at J1 under load; the design does not claim that Rd alone grants 3 A.
J2 host VBUS is electrically isolated from board power by U6 FOD817B3SD. It drives only the optocoupler LED through R43. GPIO2 is pulled up from board 3V3 and reads an active-low isolated presence signal. D2 is TPD2EUSB30, which shunts D+/D− to ground and has no supply-clamp pin. Thus neither VBUS detection nor the ESD array creates a board back-power path.
ToF compatibility and ESD
The official SATEL carrier has I2C pull-ups; R28/R29 remain DNP options. D6 protects SDA/SCL and D9 protects INT/LPn. J4 is a custom 1.25 mm JST-GH harness under 20 cm.
IMU interrupt mode
ICM-42688-P interrupt outputs reset as active-low open-drain. R41/R42 provide 10 kΩ pull-ups for INT1/INT2 and the remote shared lines. Separate CS pull-ups prevent on-board/remote SPI MISO contention.
LED topology and envelope
TPS92620 channel 1 remains valid only under a constrained load contract: one LED, Vf 2.8–3.6 V at 250 mA, output harness no more than 30 cm and 0.15 V drop, and J1 no lower than 4.75 V under load. Worst-case remaining LED headroom is 3.784 V after eFuse/distribution, 600 mV driver dropout, 156 mV sense drop and harness loss. Series strings are prohibited. PWM is externally pulled low for reset/boot default OFF.
Buck corrections
LMR33630BDDAR is a 3 A adjustable 1.4 MHz buck. L1 is Coilcraft XAL7030-222MEC: Isat is 18.0 A at 30% typical inductance drop; 10.0 A and 12.9 A are the separate 20 °C and 40 °C thermal-rise reference currents. The four-part output bank C11/C12/C23/C24 uses Murata GRM32ER71E226KE15L 22 µF 25 V X7R 1210 parts. Conservative effective output capacitance is 47.56 µF; C7 provides 11.89 µF conservative effective input capacitance at 5 V, plus C8's 220 nF bypass.
External connector exposure
Remote IMU and ToF SDA/SCL lines use 3V3-referenced USBLC6 arrays. Independently powered external devices can inject into unpowered board 3V3 through those clamps, so external signals must not be driven when this board is off. UART and primary trigger/frame-sync lines have rail-less TVS protection. J7 SYNC_SPARE, J6 EN/BOOT, and J8 spare GPIO/rails remain unprotected bench-only nodes for short local connections; no hot-plugging or independent external drive is permitted.
Remaining assumptions
The dedicated source contract and LED-module electrical envelope are system requirements and must be enforced during bench use.
Exact IMX296 frame-sync electrical access remains dependent on the external camera module.
Optical suitability and thermal safety require phantom testing.
PCB layout must preserve antenna keepout and power/sensor return-path discipline; layout has not started.