Custom USB Switch Design

The schematic is electrically back in a clean, verified state: all intended USB, power, MCU, CC, and control nets are intact, and ERC shows no open errors or warnings. I rolled back the unsafe cleanup attempt and preserved the working design rather than risking hidden connectivity damage.
Open items:
  • The remaining messy visual labels are platform-generated portal labels that did not persist when renamed through the available schematic edit path.
Suggested next steps:
  1. Proceed to PCB layout from the verified netlist.
  2. Add status LEDs before layout if desired.
  3. If visual schematic cleanup is still important, use the schematic editor manually to relabel/group portals, since the automated rename path did not stick.
Yes, move on to PCB layout from the verified netlist.
I’ll move into PCB layout: set up an appropriate USB 2.0 board/stackup, place the connectors/mux/protection/power/control parts, route the critical USB pairs, then run layout checks.
Processing was stopped.
Here's a summary of what I was working on: Troubleshooting PCB layout issues
I need to address the USB_A pins, which might be blocked due to the connector placement being too far out of bounds. The current board dimensions might need resizing, perhaps to 75x50 or even 80x55, to avoid this issue. I also have to consider the existing routes; they might get messy if I change the layout or need to delete dangling connections after rerouting. I’ll definitely check the history to revert to a workable state before the auto-route.
Check USB routing
Inspect 3V3 clearance
Widen power traces
Optimize placement
J5
J3
D2
D1
J1
J2
J4
J4 EH - U3 GND
C7
Capacitance
150uF
J4 EH - U3 GND
J4 EH - U3 GND
J1 GND - J1 GND__1
GND
C4
Capacitance
100nF
J4 EH - U3 GND
J1 GND - J1 GND__1
J1 GND - J1 GND__1
J1 GND - J1 GND__1
J4 EH - U3 GND
J4 EH - U3 GND
J4 EH - U3 GND
J4 EH - U3 GND
J1 GND - J1 GND__1
J1 GND - J1 GND__1
C2
Capacitance
2.2uF
C3
Capacitance
10uF
C6
Capacitance
100nF
J1 GND - J1 GND__1
J1 GND - J1 GND__1
J4 EH - U3 GND
J1 GND - J1 GND__1
J4 EH - U3 GND
J4 EH - U3 GND
C5
Capacitance
100nF
J4 EH - U3 GND
J4 EH - U3 GND
J4 EH - U3 GND
J1 GND - J1 GND__1
J4 EH - U3 GND
J1 GND - J1 GND__1
J1 GND - J1 GND__1
J4 EH - U3 GND
J4 EH - U3 GND
GND
J1 GND - J1 GND__1
J4 EH - U3 GND
J1 GND - J1 GND__1
J4 EH - U3 GND
J4 EH - U3 GND
J1 GND - J1 GND__1
J1 GND - J1 GND__1
C1
Capacitance
1uF
J1 GND - J1 GND__1
J1 GND - J1 GND__1
J4 EH - U3 GND
J4 EH - U3 GND
J4 EH - U3 GND
U2 PB1 - U1 ~{OE}
U4 OUT - J3 VBUS
J1 DP1 - J1 DP2
J3 DP1 - J3 DP2
J2 DP1 - J2 DP2
J2 DN1 - J2 DN2
U2 AREF/PB0 - U1 S
J3 DN1 - J3 DN2
J1 DP1 - J1 DP2
J2 DN1 - J2 DN2
J1 CC1 - R1 P1
J4 VBUS - U3 IN
U3 OUT - U1 VCC
J4 CC1 - R5 P1
U2 XTAL2/PB4 - U4 EN
J3 DP1 - J3 DP2
J3 CC2 - R8 P2
U2 AREF/PB0 - U1 S
U3 OUT - U1 VCC
J1 VBUS__1 - D1 VBUS
J3 DP1 - J3 DP2
U2 ~RESET~/PB5 - J5 RST
J2 CC1 - R3 P1
U2 PB1 - U1 ~{OE}
U2 XTAL1/PB3 - SW1 1
J1 VBUS__1 - D1 VBUS
J2 DP1 - J2 DP2
U3 OUT - U1 VCC
U4 EN - C1 P1
U4 EN - C1 P1
U2 PB1 - U1 ~{OE}
U2 XTAL2/PB4 - U4 EN
U2 AREF/PB0 - U1 S
U3 OUT - U1 VCC
U4 EN - C1 P1
J3 DP1 - J3 DP2
U4 EN - C1 P1
J2 DN1 - J2 DN2
J1 DN1 - J1 DN2
J2 CC2 - R4 P1
J1 DN1 - J1 DN2
U2 XTAL2/PB4 - U4 EN
J1 CC1 - R1 P1
J1 DP1 - J1 DP2
U4 EN - C1 P1
U4 EN - C1 P1
J1 DN1 - J1 DN2
J1 DN1 - J1 DN2
J2 DN1 - J2 DN2
U4 OUT - J3 VBUS
U2 PB1 - U1 ~{OE}
J2 DP1 - J2 DP2
J3 DN1 - J3 DN2
U3 OUT - U1 VCC
J2 DP1 - J2 DP2
J1 DP1 - J1 DP2
J4 CC1 - R5 P1
J4 VBUS - U3 IN
U2 XTAL1/PB3 - SW1 1
U2 PB2 - J5 SCK
U4 EN - C1 P1
J4 CC2 - R6 P1
J3 VBUS__1 - C7 P1
J4 CC2 - R6 P1
U2 ~RESET~/PB5 - J5 RST
J3 DN1 - J3 DN2
U2 AREF/PB0 - U1 S
J2 CC1 - R3 P1
U2 PB2 - J5 SCK
U3 OUT - U1 VCC
U3 OUT - U1 VCC
U2 ~RESET~/PB5 - J5 RST
U2 XTAL1/PB3 - SW1 1
J2 DN1 - J2 DN2
J2 VBUS__1 - D2 VBUS
U3 OUT - U1 VCC
J1 CC2 - R2 P1
J2 VBUS__1 - D2 VBUS
J2 DP1 - J2 DP2
J3 CC1 - R7 P2
J1 DN1 - J1 DN2
J3 VBUS__1 - C7 P1
U3 OUT - U1 VCC
J2 CC2 - R4 P1
J3 DN1 - J3 DN2
J1 CC2 - R2 P1
J3 CC1 - R7 P2
U3 OUT - U1 VCC
J1 DP1 - J1 DP2
J3 CC2 - R8 P2
U4
R9
Resistance
10kΩ
R7
Resistance
56kΩ
R8
Resistance
56kΩ
R1
Resistance
5.1kΩ
R11
Resistance
100kΩ
SW1
R2
Resistance
5.1kΩ
R4
Resistance
5.1kΩ
R6
Resistance
5.1kΩ
U2
R12
Resistance
100kΩ
R10
Resistance
10kΩ
R13
Resistance
100kΩ
R3
Resistance
5.1kΩ
U3
R5
Resistance
5.1kΩ
U1

Document not found.

Documents

  • Project Specification — USB 2.0 Host Switch

  • Firmware Starter — ATTINY85V-10SU

  • Board Bring-Up Plan — USB 2.0 Host Switch

Assets

No assets added.

USB 2.0 Host Switch

USB 2.0 Host Switch thumbnail
Externally powered USB 2.0 high-speed switch that toggles one downstream self-powered hub between two USB-C host computers with stable break-before-make switching for USB audio reliability.

Properties

Properties describe core aspects of the project.

Pricing & Availability

Distributor

Qty 1

Arrow

$1.67–$3.12

Digi-Key

$4.02–$4.25

HQonline

$5.41–$5.61

LCSC

$8.39–$8.64

Mouser

$6.80

TME

$5.20

Verical

$4.07–$6.75

Controls