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HE Actuator Bridge Design Notes
Purpose
HE Actuator Bridge is a conceptual actuator interface board for the AI Heimdall Deepstream system. An ESP32-POE-ISO-class controller receives MQTT commands and drives four relay outputs, one laser output, two servo PWM outputs, and an e-stop sense input.
Schematic Blocks Implemented
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Power input + protection
- J1: 12V input terminal.
- F1: 5x20 fuse holder in series with +12V.
- D1: SS34 series Schottky reverse-polarity block.
- D2: SMBJ15A TVS from protected +12V to GND.
- C1/C3: +12V bulk and HF decoupling.
- R1/LED1: +12V power indicator.
-
5V buck module interface
- J2: 1x4 MP1584-style buck module header, assumed mapping VIN/GND/VOUT/GND.
- C2/C4: +5V output bulk and HF decoupling.
- C6: extra +5V servo bulk support.
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ESP32-POE-ISO interface
- J3/J4: two 1x8 socket headers used as conceptual ESP interface.
- J3 carries 3V3, GND, relay controls, laser control, and e-stop sense.
- J4 carries servo PWM outputs plus 3V3/GND; unused pins are marked no-connect.
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Relay outputs
- K1-K4: SRD-12VDC-SL-C relays.
- Q1-Q4: AO3400A low-side MOSFET coil drivers.
- R2-R5: 220 ohm gate resistors.
- R7-R10: 100k gate pulldowns for fail-safe OFF.
- D3-D6: coil flyback diodes.
- R12-R15 + LED2/D7/D8/D9: relay status indicators.
- J5-J8: COM/NO/NC relay contact outputs.
-
Laser output
- Q5: AO3400A low-side switch.
- R6/R11: 220 ohm gate resistor and 100k pulldown.
- J9: +5V and switched low-side laser output.
-
Servo + e-stop
- J10/J11: servo headers with GND/+5V/PWM.
- J12: e-stop normally-closed loop input to GND.
- R16: 10k pull-up to 3V3 so an open e-stop loop reads as fault.
Current Net Mapping Assumptions
- J2 buck header is assumed: pin 1 VIN, pin 2 GND, pin 3 VOUT, pin 4 GND.
- ESP socket mapping is conceptual and must be checked against the exact ESP32-POE-ISO header pinout before PCB layout.
- The original concept used GPIO6/GPIO7, but on many ESP32 variants GPIO6-GPIO11 are internal flash pins and should not be used unless the specific module exposes safe equivalents.
Verification Status
- Schematic connectivity was created and checked with Flux ERC categories for floating pins, no-connects, power pins, single-pin nets, missing footprints, part availability, capacitor voltage rating, and pull-up/pull-down issues.
- No ERROR/WARNING/OPEN/UNCERTAIN checks were reported in the selected review categories at the time of this note.
Open Engineering Items Before Layout
- Confirm exact ESP32-POE-ISO pinout and replace conceptual J3/J4 mapping with real header pins.
- Confirm relay/laser/servo load currents to size F1, buck module current rating, trace widths, and connector current limits.
- Decide whether e-stop should only be sensed by firmware or should also hard-cut actuator power; for safety-critical use, hardware power interruption is preferred.
- Confirm laser module voltage/current and whether it requires current regulation rather than simple low-side switching.
- Confirm relay contact load type and voltage; add snubbers/MOVs if switching inductive or noisy external loads.
Purpose
Schematic Blocks Implemented
Current Net Mapping Assumptions
Verification Status
Open Engineering Items Before Layout
