Fixing PCB Overlapping Copper Errors

Here’s how to resolve the overlapping-copper errors flagged by DRC in your PCB layout:
  1. Inspect each error in the DRC panel
    • Open the DRC view on the right-hand side.
    • Click on an “Overlapping Copper” entry to zoom to that location on the board.
  2. Identify the conflict
    • You’ll see two copper objects (traces, pads or pours) occupying the same space.
    • Check if they belong to the same net (OK to merge) or different nets (short risk).
  3. Fix same-net overlaps
    • If both copper objects are on the same net, simply union them:
      • Select one copper shape and use Merge (right-click ▶ Merge Fills/Traces).
      • Or delete the redundant segment so only one continuous copper remains.
  4. Fix different-net overlaps
    • If they’re on different nets, you must create clearance:
      • Move one of the traces/pads away using MMove so they no longer overlap.
      • Or change one trace’s layer via ELayer and reroute on a different copper plane.
      • For copper pours, adjust the pour’s Thermal & Clearance settings so it automatically leaves a clearance around the conflicting copper.
  5. Re-run DRC to verify
    • After making changes, click Re-run DRC in the review panel to confirm that all overlapping-copper errors are cleared.
  6. (Optional) Tune design rules
    • If you frequently see minor overlaps, consider increasing your clearance rule:
      1. Go to Design RulesClearance.
      2. Raise the minimum clearance (e.g., from 6 mil to 8 mil).
      3. Refill zones and reroute traces as needed.
Following these steps should eliminate all “Overlapping Copper” violations. Once cleared, re-run the full DRC to ensure no other errors remain.
how can I remove all the silk shapes
I wasn’t able to find any documentation on a one-click command to strip out all silkscreen shapes. It looks like Flux doesn’t currently offer a global “remove all silk” feature.
For more detail or to request this capability, you can check the Flux docs or join the Flux community:
Hide silkscreen layer
Select silkscreen shapes
Rule to disable silk
Write rule syntax
Hide with rule
J6
J1
C4
Capacitance
0.1uF
F2
C2
Capacitance
470pF
J2
J5
C3
Capacitance
100pF
J3
C1
Capacitance
1000pF
RUEF500
F1
XT60 Male (LIPO)
J4
Red (Vin+) Banana Plug (LIPO)
SS34
Barrel Connector Jack (Wall Power)
D1
SS34
Black (GND) Banana Plug (LIPO)
KMG 25V330 330p F
IRLML6402TRPBF-VB

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