Project Startup

Worked for 3 mins
Thought for 16 sec
Managing assets.
Thought for 17 sec — Gathering documentation and schematics
Reading project docs.
Thought for 13 sec
Getting a schematic overview for ESP32.
Thought for 12 sec
Reading schematic details while tracing connections from U1.
Thought for 16 sec — Considering pin mappings
Reading schematic details for U1.
Thought for 47 sec — Creating project documentation
Updating 2 project docs.
Created 2 project docs

Firmware Starter — ESP32-S3-WROOM-1-N16R8

View Document
Firmware Starter — ESP32-S3-WROOM-1-N16R8 Platform & Toolchain
  • MCU: U1, ESP32-S3-WROOM-1-N16R8
  • Framework: Arduino-ESP32 through PlatformIO
  • Purpose: Safe board bring-up firmware. Peripheral rails default off; transmit-capable modules require explicit user action.
Pin Mapping
Low-speed power enables, isolation controls, buttons, presence inputs, and night-mode control are provided through TCA9535 expanders U23 and U32 on the system I2C bus. Their exact port roles are defined by the net names in the schematic and must remain default-off until configured.
platformio.ini Complete Starter Source — src/main.cpp Build & Flash
Set SW3 to DOWNLOAD or hold BOOT (SW2) while resetting (SW1) to enter the ROM bootloader. Return SW3 to NORMAL after ...

Board Bring-Up Plan

View Document
Board Bring-Up Plan Prerequisites
  • Bench supply with current limit, DMM, oscilloscope, USB current meter, thermal camera, USB data isolator, logic analyzer, known-good 1S protected packs, and ESD-safe workstation.
  • Use the Firmware Starter safe bring-up image.
  • Start without NFC, sub-GHz, display, removable storage, debug target, microphone, speaker, or expansion modules attached.
1. Visual and Unpowered Inspection
  • Verify orientation and soldering of U1–U38, D1–D5, Q1, F2/F3, polarized battery connectors, USB-C J1, microSD J3, and switches SW1–SW3.
  • Confirm no conductive debris beneath shielded modules or connectors.
  • Measure resistance from USB_VBUS, PACK_A_FUSED, PACK_B_FUSED, VBAT, VSYS, 3V3, 5V_BOOST, and 5V_TARGET to GND. Investigate readings below 10 ohms befo...
M

macswim

Can it have a keyboard

flux

Yes. I’ll include a compact, glove-tolerant thumb QWERTY keyboard in the handheld concept, plus the existing directional controls and dedicated power/back keys. It will connect through the I/O expander as a scanned key matrix so it uses few ESP32 pins and can wake the device from sleep.

flux

The concept image is saved, and I created the Firmware Starter and Board Bring-Up Plan.
Before placement, confirm this layout plan:
  • Main PCB: retain 160 × 100 mm, four layers, standard through-vias.
  • Keyboard: separate front-panel thumb-QWERTY matrix PCB connected through the I/O expander; directional, power, and back controls remain dedicated.
  • Top side: MCU, power stages, radios/modules, SD, connectors, switches, and tall components.
  • Bottom side: small passives only.
  • Edges: USB-C and SD accessible at the front; debug/expansion ports along one side; batteries and emergency-isolation interfaces opposite; antennas separated along the rear edge.
  • RF: dedicated NFC, sub-GHz, and ESP32 antenna keepouts.
  • Manufacturing: standard 1 oz copper, no HDI or microvias; compatible with mainstream prototype fabs.
Reply confirmed to start placement and routing, or specify a different board size or keyboard arrangement.
Sign up to send

Files

Schematic

Layout

3D View

Schematic Repair and Feature Audit
Verification
  • Exhaustive ERC subset (floating pins, single-pin nets, pin/driver conflicts, power inputs, no-connects, shorts, undriven nets, wire endpoints, annotation): no open errors or warnings after the dual-battery, acoustic, and storage changes.
  • PCB placement/routing was not changed. Every newly added footprint remains unplaced and unrouted.
Implemented architecture
Dual protected-pack power path
  • J12 and J13 are keyed three-position protected-pack connectors: pin 1 battery positive, pin 2 ground, pin 3 active-low presence contact returned to ground in the pack harness.
  • F2 and F3 provide independent 4 A bay fusing.
  • U29/U30 are independent MCP73831 charge channels. R81/R82 are 10 kΩ, programming 100 mA per bay. Both channels charge only their own fused pack from USB_VBUS.
  • U28 TPS2121 selects between PACK_A_FUSED and PACK_B_FUSED with reverse-current blocking. R83 = 25.5 kΩ programs an approximately 4 A shared limit; C56 provides soft start; C53/C54/C55 provide local hot-plug/output reservoirs.
  • The legacy U2 BQ25895 remains the existing system power-path device, but its CE control was removed from firmware and R64 holds charging disabled so it cannot cross-charge packs on the muxed VBAT node.
  • U31 ADS1115 measures pack A, pack B, and muxed VBAT through 100 kΩ / 100 kΩ dividers. Address is 0x48.
  • U32 TCA9535 is the second control expander at address 0x21. It reads charger status, pack presence, and mux status and owns slow power-control outputs.
Guarded emergency isolation
  • J14 is a four-wire interface for a maintained guarded DPST emergency switch.
  • One pole connects PACK_A_FUSED to BAT_A_KILL_OV; the other connects PACK_B_FUSED to BAT_B_KILL_OV. Opening the guarded switch restores the default-enabled OV pulldowns; closing it drives both TPS2121 OV inputs high and blocks both battery inputs.
  • Isolation is independent of MCU firmware and independent of the 3.3 V rail.
  • The final enclosure switch must be maintained DPST, guarded against accidental operation, and rated for the battery-bay environment. Verify its contact orientation before harness release.
Acoustic capture and output
  • U37 MSM261S4030H0R provides power-gated digital I²S microphone capture on 3V3_MIC_SW.
  • U38 MAX98357A provides power-gated differential class-D speaker output on VSYS_AUDIO_SW.
  • J15 is a keyed two-pin speaker connector. Use an 8 Ω speaker; neither lead may be grounded. Firmware volume limiting is required to preserve battery-path current margin.
  • U33/U34 TPS22918 load switches default off through R98/R99 and use C65/C66 for controlled rise time.
Removable-storage expansion
  • J16 is a keyed ten-pin JST GH internal-bay interface:
    1. 3V3_STORAGE_SW
    2. GND
    3. STORAGE_SPI_CLK
    4. STORAGE_SPI_MOSI
    5. STORAGE_SPI_MISO
    6. STORAGE_SPI_CS
    7. STORAGE_PRESENT_N
    8. GND
    9. 3V3_STORAGE_SW
    10. GND
  • U35 power-gates the bay. U36 SN74CB3T3245 isolates CLK/MOSI/MISO/CS.
  • R101 pulls STORAGE_ISO_OE_N high, so the bus defaults disconnected. Firmware may pull OE low only after the bay rail is stable.
  • The expansion bay has an independent ESP32 chip select and does not reuse the onboard microSD CS.
GPIO and control map
ESP32-S3

Table

GPIOAssignment
GPIO4I2S_BCLK
GPIO5I2S_WS
GPIO6I2S_MIC_SD
GPIO7I2S_AMP_DIN
GPIO21SPI_CS_STORAGE
U32 TCA9535 (0x21)

Table

PinAssignment
P00EN_DISPLAY_PWR
P01EN_SD_PWR
P02EN_NFC_PWR
P03EN_SUBGHZ_PWR
P04EN_IR_PWR
P05EN_MIC_PWR
P06EN_AUDIO_AMP_PWR
P07EN_STORAGE_PWR
P10STORAGE_ISO_OE_N
P11STORAGE_PRESENT_N
P12PACK_A_PRESENT_N
P13PACK_B_PRESENT_N
P14CHG_A_STAT_N
P15CHG_B_STAT_N
P16BAT_MUX_STATUS
P17NC/reserved
Antenna-interface decision
  • The ESP32-S3-WROOM-1 PCB antenna is retained. WROOM-1U was not substituted because its mechanical dimensions and recommended land pattern are separately specified; drop-in compatibility is not established.
  • No U.FL connector was added to the generic NFC or sub-GHz module headers. Their current symbols do not define documented 50 Ω RF or differential external-coil terminals, so adding a connector would create an electrically ambiguous and mechanically invalid RF path.
  • A future external-antenna option requires selection of the exact radio/NFC module first, followed by the module vendor’s antenna topology, matching network, connector placement, ground-via fence, keep-out, and regulatory review.
Safe firmware defaults
  1. Configure U32 outputs low before enabling any optional subsystem.
  2. Keep STORAGE_ISO_OE_N high until 3V3_STORAGE_SW is stable; disable isolation before removing bay power.
  3. Keep the microphone and amplifier rails off except during use.
  4. Apply volume limiting for the 8 Ω speaker and prevent maximum audio output during other high-current modes.
  5. Treat charger status and pack-presence signals as active low.
  6. Do not re-enable U2 charging; U29/U30 are the only pack chargers.
  7. Use USB current advertisement/status to restrict system loads while both 100 mA charge channels are active.
Remaining design gates
  1. Place and route all new footprints. U28, F2/F3, J12/J13, C53/C54, and high-current copper must be treated as a compact battery hot-plug block.
  2. Keep TPS2121 input/output loops short and use wide copper sized for the 4 A limit; verify transient droop and thermal rise on hardware.
  3. Place U38 and its bypass capacitors adjacent to J15; route OUTP/OUTN as a tight differential power pair away from microphone/I²S traces.
  4. Place U37 at the intended acoustic port with a manufacturer-compliant bottom-port keep-out and contamination barrier strategy.
  5. Place J16 at an accessible internal bay edge and keep U36 between the shared bus and connector.
  6. Confirm the guarded DPST switch contact orientation and harness pinout before enclosure release.
  7. Revalidate translator operating ranges, SW3 common/contact orientation, and DM3AT-SF-PEJM5 eject mechanics from their drawings.
  8. Run PCB DRC, current-density, return-path, and thermal checks after placement/routing.

  • Verification

  • Implemented architecture

  • Dual protected-pack power path

  • Guarded emergency isolation

  • Acoustic capture and output

  • Removable-storage expansion

  • GPIO and control map

  • ESP32-S3

  • U32 TCA9535 (0x21)

  • Antenna-interface decision

  • Safe firmware defaults

  • Remaining design gates