Desk Screen Design

Worked for 4 mins 9 sec
Thought for 9 sec — Considering project design
Created 4 tasks.
1/4 Define the schematic architecture and power budget from the write-up

Define the schematic architecture and power budget from the write-up

Build the USB-C input, 3.3 V buck, 8 V boost, P8 divider, and tap detector

Verify connectivity, component values, and ERC findings

Name and document the project

Accessed knowledge for the next task.
Thought for 5 sec
Referenced guidance.
Thought for 30 sec — Planning project architecture
Thought for 4 sec — Fetching project assets
Referenced guidance.
Getting project info.
Reading project assets.
Getting a schematic overview.
Reading project docs.
Thought for 37 sec — Creating documentation and calculations
Renamed Desk Screen Power & Tap Controller.
Updated project description.
Updating 3 project docs.
Thought for 4 sec — Looking into USB-C projects
Searching flux-reference-design account for "USB-C".
Searching flux-reference-design account for "buck converter".
Searching flux-reference-design account for "boost converter".
Searching flux-reference-design account for "piezo".
Thought for 16 sec
Found 2 results for TPS628302ADRLR exact Texas Instruments 2 A adjustable buck converter VSON-HR package for 5 V to 3.3 V rail, active lifecycle and datasheet attached.
Found 3 results for LT1935ES5 exact Analog Devices Linear Technology boost converter SOT-23-5 for 5 V input to 8 V output, active lifecycle and datasheet attached.
Found 3 results for USB Type-C receptacle power-only USB 2.0 connector with through-hole shield tabs and hand-solderable SMD signal pins, all VBUS CC1 CC2 and GND pins exposed, rated 3 A.
Found 3 results for resettable fuse or low resistance current protection for 5 V USB-C input approximately 3 A operating current in hand-solderable SMD package, active part.
Found 3 results for unidirectional 5 V TVS diode for USB VBUS input protection, low clamping voltage, at least 3 A power path shunt protection, SMA or SMB hand-solderable SMD.
Found 10 results for 1N4148.
Found 3 results for low leakage dual Schottky diode rail clamp topology for protecting ESP32 3.3 V ADC input to 3V3 and GND, low capacitance, SOT-23, active component.
Found 3 results for Schottky rectifier for LT1935 boost converter 5 V to 8 V output, at least 20 V reverse rating and 1 A average current, low forward drop, SMA hand-solderable SMD.
Found 3 results for 2 pin and multi-pin 2.54 mm through-hole headers for power outputs and external ESP32 interface, hand solderable, active lifecycle.
Found 3 results for PCB test point loop or compact SMD test point suitable for probing 3 A low voltage rails during bring-up.
Thought for 16 sec
Thought for 8 sec — Searching for components
Read LT1935ES5#PBF, PRTR5V0U2X datasheets.
Found 2 results for TPS628302.
Found 2 results for TPS628302ADRLR.
Found 9 results for BAS70-04.
Found 2 results for Conn_01x02.
Found 2 results for Conn_01x03.
Found 2 results for Conn_02x04.
Thought for 30 sec
Thought for 3 sec — Considering TPS Creation
Thought for 3 sec
Read self tps628303.pdf.
  • self: SOT583 DRL pin configuration and pin functions TPS628302A
  • self: typical application circuit adjustable output component valu...
  • self: feedback reference voltage equation resistor divider 1.12 MO...
  • self: recommended input capacitance output effective capacitance a...
  • self: MODE pin low behavior PG open drain pullup and EN connection- self: SOT583 DRL pin configuration and pin functions TPS628302A
  • self: typical application circuit adjustable output component valu...
  • self: feedback reference voltage equation resistor divider 1.12 MO...
  • self: recommended input capacitance output effective capacitance a...
  • self: MODE pin low behavior PG open drain pullup and EN connection- self: SOT583 DRL pin configuration and pin functions TPS628302A
  • self: typical application circuit adjustable output component valu...
  • self: feedback reference voltage equation resistor divider 1.12 MO...
  • self: recommended input capacitance output effective capacitance a...
  • self: MODE pin low behavior PG open drain pullup and EN connection
Created 3 project docs

Block Diagram

View Document

Block Diagram Scope Exclusions
No mains PSU, CCFL inverter, 13 V audio rail, or PROTECT3 bypass is included.
Block Sourcing Plan
  • USB-C input/protection: reference search required; otherwise datasheet-backed parts from scratch.
  • 3.3 V buck: exact TPS628302ADRLR datasheet application circuit.
  • 8 V boost: LT1935ES5 datasheet topology adapted from its 5 V input reference.
  • P8 divider: from scratch using 1% generic passives; function remains provisional.
  • Tap detector: from scratch with a datasheet-supported low-leakage ADC clamp.

Project Specification

View Document

Project Specification Project Overview
First-pass professional SMD schematic for rebuilding only the low-voltage television power and tap-control functions. Status: Draft / schematic checkpoint.
Intended Use
Prototype/validation board powered by a dedicated USB-C 5 V supply. It replaces selected low-voltage rails and exposes a piezo tap signal to an externally plugged ESP32-C3 Supermini.
What the Device Should Do
  • Accept 5 V through a power-only USB-C sink receptacle.
  • Protect and filter the input, then generate 3.3 V and 8 V television rails.
  • Generate provisional P8_REF near 1.038 V from 8 V.
  • Condition a piezo pulse into an ADC-safe TAP_ADC signal.
Main Features
  • Independent 5.1 kΩ Rd on CC1 and CC2; no USB data or PD negotiation.

Power Budget

View Document

Power Budget Assumptions
  • Minimum converter input for budgeting: 4.5 V.
  • Conservative buck efficiency: 85%.
  • Conservative boost efficiency: 85%.
  • ESP32-C3 Supermini is separately USB-powered and excluded.
Peak Loads Reflected to 5 V Input
At nominal 5.0 V and 85% efficiency, the two principal loads require approximately 2.49 A plus quiescent/control current.
Source and Protection Requirement
Use a dedicated regulated 5 V/3 A USB-C supply and a low-resistance cable. The board uses fixed Rd sink resistors but does not measure CC voltage and therefore does not detect whether the source advertises default, 1.5 A, or 3 A current. It must not be connected to an ordinary default-current USB port while full loads are enabled.
skip the peisco
Got it—piezo/tap detection is removed from scope. The project is renamed Desk Screen Power & Tap Controller, but no schematic components were added because ACUs ran out; remaining work is the USB-C input, protected 3.3 V and 8 V rails, P8 reference, connectors, and ERC verification.
Correct project title
Clean up revised scope
Remove stale tap references
Select power components
Document power requirements
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Project Specification
Project Overview
First-pass professional SMD schematic for rebuilding only the low-voltage television power and tap-control functions. Status: Draft / schematic checkpoint.
Intended Use
Prototype/validation board powered by a dedicated USB-C 5 V supply. It replaces selected low-voltage rails and exposes a piezo tap signal to an externally plugged ESP32-C3 Supermini.
What the Device Should Do
  • Accept 5 V through a power-only USB-C sink receptacle.
  • Protect and filter the input, then generate 3.3 V and 8 V television rails.
  • Generate provisional P8_REF near 1.038 V from 8 V.
  • Condition a piezo pulse into an ADC-safe TAP_ADC signal.
Main Features
  • Independent 5.1 kΩ Rd on CC1 and CC2; no USB data or PD negotiation.
  • TPS628302ADRLR 3.3 V/2 A buck.
  • LT1935ES5 boost adapted to 8 V, with allowed load limited by verified switch/thermal capability.
  • External ESP32 header carrying TAP_ADC, 3V3, and GND; module powered separately by its own USB.
  • Bring-up test access on critical rails where practical.
System Architecture
See Block Diagram project file.
Hardware Subsystems
  1. USB-C input, overcurrent protection, 5 V TVS, input bulk and HF capacitance.
  2. 3.3 V synchronous buck with EN tied to VIN, MODE low, PG pull-up, LC/output network and feedback divider per exact datasheet.
  3. 8 V boost with inductor, Schottky rectifier, feedback divider and valid capacitors per LT1935 datasheet.
  4. P8 divider and optional justified filter capacitor.
  5. Piezo rectifier/envelope and low-leakage ADC clamp.
  6. Input/output connectors and critical test points.
Interfaces and Connections
Named nets: USB_5V_RAW, 5V_PROTECTED, 3V3_TV, 8V_TV, P8_REF, PIEZO_RAW, TAP_ADC, GND.
Power and Runtime Expectations
Continuous external supply. A dedicated regulated 5 V/3 A USB-C source and low-loss cable are required. The source must advertise/supply the required current; CC current-advertisement detection is not implemented, so connection to ordinary default-current USB ports is not permitted.
Power Tree and Power Budget
See Power Budget project file.
Manufacturing and Assembly Expectations
Professional SMD PCB. Prefer leaded/hand-solderable IC packages and 0603/0805 passives where electrically practical. PCB layout is explicitly out of scope for this checkpoint.
Firmware-Relevant Hardware Requirements
Firmware samples TAP_ADC on the external ESP32-C3. Apply a 30–50 ms lockout after a valid tap. Lockout is firmware-only.
Physical Design Expectations
Connector accessibility and compact power loops will be addressed during the later PCB phase. No board dimensions are yet specified.
Important Design Decisions
  • No PD controller; 5 V only.
  • ESP32-C3 Supermini is not powered from this board.
  • No mains PSU, CCFL inverter, 13 V audio rail, or PROTECT3 bypass.
  • P8 function is unconfirmed and must be validated against the target TV harness before use.
Assumptions
  • USB input may droop to 4.5 V at the protected converter input for worst-case budgeting.
  • Conservative first-pass efficiency: 85% for both rails.
  • Peak loads: 3.3 V at 2.0 A and requested 8 V at 0.5 A, subject to LT1935 verification.
Change Notes
  • Initial specification created from the Desk Screen Rebuild requirements.
  • Project Overview

  • Intended Use

  • What the Device Should Do

  • Main Features

  • System Architecture

  • Hardware Subsystems

  • Interfaces and Connections

  • Power and Runtime Expectations

  • Power Tree and Power Budget

  • Manufacturing and Assembly Expectations

  • Firmware-Relevant Hardware Requirements

  • Physical Design Expectations

  • Important Design Decisions

  • Assumptions

  • Change Notes

Assets

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Desk Screen Power & Tap Controller 7820

Desk Screen Power & Tap Controller 7820 thumbnail
USB-C 5 V powered controller generating protected 3.3 V and 8 V television rails plus a piezo tap-detector interface for an external ESP32-C3 module.

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