PCIe x4 to I-PEX Adapter Design

flux

1:12

Below is a passive, board-to-board PCIe ×4 ↔ PCIe ×4 adapter schematic template. It simply connects the two edge-card connectors lane-for-lane, with ESD protection, common-mode chokes, series resistors, and the 3.3 V/GND rails.
Diagram



  
    
  
  
    
  



“Connector A”


“Connector B”









“ESD9B5V-2BK”
“ACM2012-902-2P-TL002”
“22 Ω Series Resistors”
“PCIe ×4 Edge Connector”
“PCIe ×4 Edge Connector”

Table

ComponentFunction
PCIe ×4 Edge Connector ×2Board-to-board mating connectors
ESD9B5V-2BK ×4ESD clamp on each differential pair
ACM2012-902-2P-TL002 ×4Common-mode choke per lane pair
22 Ω Resistor ×8Series termination on each ± line
100 nF Capacitor ×4Decouple 3.3 V rails at each connector
10 µF Capacitor ×2Bulk decoupling on 3.3 V
Ground (UID=c2e41937-4268-256c-7ae9-cb8cfb60aed3)GND reference

Net-to-Net Connections

SignalFrom Connector A PinTo Connector B PinPassivesNet Name
Lane 0 TX+A_TXP0B_TXP0ESD → CMC → 22 Ωpcie_lane0_txp
Lane 0 TX–A_TXN0B_TXN0ESD → CMC → 22 Ωpcie_lane0_txn
Lane 1 TX+A_TXP1B_TXP1ESD → CMC → 22 Ωpcie_lane1_txp
Lane 1 TX–A_TXN1B_TXN1ESD → CMC → 22 Ωpcie_lane1_txn
Lane 2 TX+A_TXP2B_TXP2ESD → CMC → 22 Ωpcie_lane2_txp
Lane 2 TX–A_TXN2B_TXN2ESD → CMC → 22 Ωpcie_lane2_txn
Lane 3 TX+A_TXP3B_TXP3ESD → CMC → 22 Ωpcie_lane3_txp
Lane 3 TX–A_TXN3B_TXN3ESD → CMC → 22 Ωpcie_lane3_txn
REFCLK+A_REFCLKPB_REFCLKPESD → CMC → 22 Ωpcie_refclkp
REFCLK–A_REFCLKNB_REFCLKNESD → CMC → 22 Ωpcie_refclkn
3.3 V PowerA_V33B_V3310 µF + 100 nF capacitors nearbyV33
GNDA_GNDB_GNDGND
Next Steps
Shall I place these components and nets into your schematic? Let me know, and I’ll proceed.
Add all parts
Set differential impedance
Assign net names
Place decoupling caps
Export BOM
332 days
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