PCB Layout Design Guidance
can you remove all text that is printed on the pcb
Thought for 15 sec
I’ll remove all PCB text/silkscreen text objects from the layout, including reference/value text, then verify that no text nodes remain.
Worked for 53 sec
I removed PCB-printed text by disabling all layout text objects, so reference/value/silkscreen text should no longer print.
Completed in this session:
- Moved P1 spring/pogo connector to the bottom side at the bottom edge.
- Added bottom copper touch electrode pads.
- Added two 3.5mm screw holes.
- Moved the right screw hole to x=29mm, y=26mm.
- Set the other screw hole to x=-19.5mm, y=-7mm.
- Disabled all PCB text objects.
Remaining:
- I could not run the final verification because execution credits ran out immediately after the text-removal change was applied.
- Next step should be to inspect the PCB layout and confirm text count is zero / no silkscreen text is visible.
Run DRC check
Find remaining text
Generate Gerbers
Check R5 text
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Project Specification
Project
UK Smart Wall Switch Back Board
Goal
Design a 65 mm x 65 mm PCB back board for a UK smart wall switch that fits inside a standard UK single-gang back box and connects to a smart front display board through a 12-pin pogo connector.
Functional Blocks
- PoE power input and isolated 5 V flyback supply
- TPS23751PWPR IEEE 802.3af PoE PD controller / flyback converter
- Coilcraft NA5730-AL flyback transformer
- HR911105A RJ45 MagJack with integrated magnetics
- Target output: isolated 5 V, 2 A
- Secondary 3.3 V rail
- AMS1117-3.3 linear regulator from 5 V
- Ethernet data
- WIZnet W5500 SPI Ethernet controller
- 25 MHz crystal
- SPI passed to the front board through pogo pins
- Relay switching
- 3x SRD-05VDC-SL-C SPDT relays
- 3x PC817 optocouplers
- 3x BC337 relay driver transistors
- 3x 1N4007 flyback diodes
- 3x Phoenix MKDS 3-pin mains screw terminals
- Energy monitoring
- BL0942 energy monitoring IC on mains live line before relays
- Touch sensing
- 3x TTP223-BA6 capacitive touch ICs
- Copper pad zones on PCB surface as touch electrodes
- Front-board pogo connector
- 12 pins: +5 V x2, GND x2, W5500 SPI, relay controls, spare
Pogo Pinout
Table
| Pin | Signal |
|---|---|
| 1 | +5V |
| 2 | +5V |
| 3 | GND |
| 4 | GND |
| 5 | W5500 MOSI |
| 6 | W5500 MISO |
| 7 | W5500 SCLK |
| 8 | W5500 CS |
| 9 | Relay 1 control |
| 10 | Relay 2 control |
| 11 | Relay 3 control |
| 12 | Spare |
PCB Constraints
- Board size: 65 mm x 65 mm.
- User-requested stackup: 2 layers.
- Mains traces: minimum 1.5 mm wide.
- Mains-to-low-voltage clearance/creepage: minimum 3 mm.
- Through-hole: relays, screw terminals, RJ45, transformer, pogo pins.
- SMD components on top where possible.
- Conformal coating recommended for the final design.
Grounding Requirement
- GNDD: primary-side PoE ground.
- PGND: secondary-side power ground.
- GND: signal ground.
- Requested: all three join at a single star point under transformer.
- Design note: because the flyback is specified as isolated, the isolation boundary and any deliberate primary-secondary reference point must be verified against the TPS23751 reference design and safety requirements before layout.
Critical Engineering Notes
- Ethernet and SPI clocking normally benefit from a continuous reference plane. The user requested 2 layers, but controlled-impedance guidance indicates Ethernet or SPI >10 MHz is a 4-layer-minimum case. If the 2-layer constraint is mandatory, routing must be short, tightly referenced with local ground fill/stitching, and flagged as a signal-integrity compromise.
- Mains switching, metering, PoE isolation, and touch electrodes all share a very small 65 mm board; layout must maintain physical separation between hazardous mains, PoE primary, isolated secondary, and user-facing/front-board interfaces.
- BL0942 mains sensing requires datasheet-grounded isolation and front-board signal-interface review before final wiring.
Approved Functional Substitutions
- Coilcraft NA5730-AL was not available in the library. Use Coilcraft POE13P-50LD as the functional PoE flyback replacement: 13 W PoE flyback transformer, 127 uH primary inductance, 5.0 V / 2.6 A output with secondary windings in parallel, suitable for the requested 5 V 2 A isolated output after TPS23751 compatibility verification.
- No single 12-position pogo connector was available in the library. Use 12x Same Sky CPG-45-TH-TR individual through-hole spring-loaded pogo contacts arranged as a 12-contact pogo array. Each contact is rated 12 V / 1 A, adequate for two +5 V pins, two GND pins, SPI, relay controls, and spare signal contact.
- These substitutions preserve the requested function rather than exact mechanical grouping: PoE isolated 5 V conversion and 12 spring-loaded pogo contacts to the front display board.
Project
Goal
Functional Blocks
Pogo Pinout
PCB Constraints
Grounding Requirement
Critical Engineering Notes
Approved Functional Substitutions
