READ ONLY audit existing THVD1450DR part. No mutations, repairs, substitutions, publishes, or document writes. Inspect ACTUAL physical footprint pad count, pad mappings, dimensions and coordinates (not indexed 14-SOIC tag). Compare with TI THVD1450DR D SOIC8 datasheet https://www.ti.com/lit/ds/symlink/thvd1450.pdf using query_datasheet official evidence. Report eight-pad SOIC geometry PASS/FAIL or specific unavailable inspection blocker. Include actual pad coordinate/size evidence, pitch and row span, pin mappings, body if available. Only inspect your active part project. Report concisely to parent; gateway must remain untouched.
PASS: actual eight-pad SOIC geometry and pin mapping—not SOIC-14; FAIL: exact TI example-land-pattern match. Actual pad centers in mm (Flux coordinates): 1/R (−1.91,−2.77), 2/RE̅ (−0.63,−2.77), 3/DE (+0.63,−2.77), 4/D (+1.90,−2.77), 5/GND (+1.90,+2.77), 6/A (+0.63,+2.77), 7/B (−0.63,+2.77), 8/VCC (−1.91,+2.77); all eight pads are 0.59 × 2.05 mm, adjacent pitches 1.28/1.26/1.27 mm, opposing-row centers 5.54 mm, with mappings matching TI.
TI D0008A’s example specifies 0.60 × 1.55 mm pads, 1.27 mm pitch, 5.40 mm row spacing—so this footprint has longer pads and wider row spacing, not automatically an incompatible footprint; verified evidence handle: dsq_f6ceac5df5424faed02c, keys ds1–ds4.
The footprint payload and eight live pad nodes agree after converting stored meter-valued geometry to mm; its silkscreen rectangle is 5.06 × 3.04 mm, but actual body dimensions were unavailable (packageSize=0), and no project mutations, document writes, or gateway inspection occurred.