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Pins

Symbol

Layout

3D View

PB1/AN0/TIM1_CH4/CLKO/TIM1_CH2N
UART2_RX/SPI_NSS/TIM2_CH3/[LVDOUT]/PB5
VDD
PA3/AN1/[TIM2_CH3]/[UART2_TX]
PA2/[TIM1_CH4]/[I2C_SCL]/[UART1_RX]/ISPCK
ELVD1/TIM1_CH1N/MCLRB/AN5/PC0
PA0/SPI_MOSI/TIM1_CH1/VREFN
PB4/[LVDOUT]/I2C_SDA/TIM1_BKIN/UART2_TX
OP0P/UART1_CK/TIM2_CH1/LVDOUT/PA5
PA4/AN2/TIM2_CH2/ADC_ETR/[UART2_RX]
OP0N/UART1_TX/AN3/PA6
[UART2_TX]/[AT0]/OP0OUT/ELVD0/UART1_RX/[TIM1_CH4]/[CLKO]/AN4/PA7
ISPDAT/[UART1_TX]/[I2C_SDA]/AN6/PB6
PB2/TIM1_CH3/[SPI_SCK]/[TIM1_CH1N]
ELVD2/[SPI_MISO]/OSC1/PC1
ELVD3/[SPI_MOSI]/OSC2/PB7
PB0/[TIM1_CH2]/SPI_SCK/TIM1_CH3N/[TIM2_CH1]
PB3/[LVDOUT]I2C_SCL/[ADC_ETR]/TIM1_ETR/UART2_CK
GND
PA1/SPI_MISO/TIM1_CH2/VREFP
Name
Pin #
Type
Section
Pin Group
OP0P/UART1_CK/TIM2_CH1/LVDOUT/PA5
1
Unspecified
OP0N/UART1_TX/AN3/PA6
2
Unspecified
[UART2_TX]/[AT0]/OP0OUT/ELVD0/UART1_RX/[TIM1_CH4]/[CLKO]/AN4/PA7
3
Unspecified
ELVD1/TIM1_CH1N/MCLRB/AN5/PC0
4
Unspecified
ELVD2/[SPI_MISO]/OSC1/PC1
5
Unspecified
ELVD3/[SPI_MOSI]/OSC2/PB7
6
Unspecified
GND
7
Unspecified
ISPDAT/[UART1_TX]/[I2C_SDA]/AN6/PB6
8
Unspecified
VDD
9
Unspecified
UART2_RX/SPI_NSS/TIM2_CH3/[LVDOUT]/PB5
10
Unspecified
PB4/[LVDOUT]/I2C_SDA/TIM1_BKIN/UART2_TX
11
Unspecified
PB3/[LVDOUT]I2C_SCL/[ADC_ETR]/TIM1_ETR/UART2_CK
12
Unspecified
PB2/TIM1_CH3/[SPI_SCK]/[TIM1_CH1N]
13
Unspecified
PB1/AN0/TIM1_CH4/CLKO/TIM1_CH2N
14
Unspecified
PB0/[TIM1_CH2]/SPI_SCK/TIM1_CH3N/[TIM2_CH1]
15
Unspecified
PA0/SPI_MOSI/TIM1_CH1/VREFN
16
Unspecified
PA1/SPI_MISO/TIM1_CH2/VREFP
17
Unspecified
PA2/[TIM1_CH4]/[I2C_SCL]/[UART1_RX]/ISPCK
18
Unspecified
PA3/AN1/[TIM2_CH3]/[UART2_TX]
19
Unspecified
PA4/AN2/TIM2_CH2/ADC_ETR/[UART2_RX]
20
Unspecified

FT64F0A5-TRB