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Pins

Symbol

Layout

3D View

ADC_IN4/UART5_TX/SEG23/PD1
EP
ADC_IN10/SVS/(WKUP0)PA15
PC4/SEG13/UART5_RX/OPA1_OUT
PB9/SEG8/SPI1_SCK/GPT0_ETR/ANATST
ATIM_BRK1/ADC_IN2/FOUT0/(WKUP6)PD11
VSS
ADC_IN3/UART5_RX/SEG22/PD0
SWIO/PD8
PB13/OPA2_INN1/SEG11/UART1_RX/LPUART1_RX
PB2(WKUP2)/UART4_RX/ATIM_CH1N
PB11/SEG10/SPI1_MOSI/GPT0_CH2/OPA1_INP1
PB3/UART4_TX/ATIM_CH2N
PC2/XTHIN/UART1_RX/LPUART1_RX
PC8/SEG17/ADC_IN9/SPI2_SCK
COMP1_INN1/LPT32_ETR/SEG2/(WKUP1)PA10
PB14/OPA2_INP1/SEG12/UART1_TX/LPUART1_TX
PC3/XTHOUT/UART1_TX/LPUART1_TX
VDD15
ADC_IN7/LPUART0_TX/UART0_TX/PA14
PD10/XT32KI
XT32KO/PD9
NRST
PC5/SEG14/UART5_TX/OPA2_OUT
ADC_IN6/LPUART0_RX/UART0_RX/PA13
SWCLK/PD7
COMP2_INP1/LPT32_CH1/SEG0/PA8
PC10(WKUP5)/SEG19/ADC_IN1/SPI2_MOSI
COMP2_INP2/LPT32_CH2/SEG1/PA9
PB8/SEG7/SPI1_SSN/ATIM_CH3N
PC9/SEG18/ADC_IN0/SPI2_MISO
PB10/SEG9/SPI1_MISO/GPT0_CH1/OPA1_INN1
VDD
Name
Pin #
Type
Section
Pin Group
Orientation
SWIO/PD8
1
Unspecified
NRST
2
Unspecified
ADC_IN6/LPUART0_RX/UART0_RX/PA13
3
Unspecified
ADC_IN7/LPUART0_TX/UART0_TX/PA14
4
Unspecified
ADC_IN10/SVS/(WKUP0)PA15
5
Unspecified
COMP2_INP1/LPT32_CH1/SEG0/PA8
6
Unspecified
COMP2_INP2/LPT32_CH2/SEG1/PA9
7
Unspecified
COMP1_INN1/LPT32_ETR/SEG2/(WKUP1)PA10
8
Unspecified
PB2(WKUP2)/UART4_RX/ATIM_CH1N
9
Unspecified
PB3/UART4_TX/ATIM_CH2N
10
Unspecified
PB8/SEG7/SPI1_SSN/ATIM_CH3N
11
Unspecified
PB9/SEG8/SPI1_SCK/GPT0_ETR/ANATST
12
Unspecified
PB10/SEG9/SPI1_MISO/GPT0_CH1/OPA1_INN1
13
Unspecified
PB11/SEG10/SPI1_MOSI/GPT0_CH2/OPA1_INP1
14
Unspecified
PB13/OPA2_INN1/SEG11/UART1_RX/LPUART1_RX
15
Unspecified
PB14/OPA2_INP1/SEG12/UART1_TX/LPUART1_TX
16
Unspecified
PC2/XTHIN/UART1_RX/LPUART1_RX
17
Unspecified
PC3/XTHOUT/UART1_TX/LPUART1_TX
18
Unspecified
PC4/SEG13/UART5_RX/OPA1_OUT
19
Unspecified
PC5/SEG14/UART5_TX/OPA2_OUT
20
Unspecified
PC8/SEG17/ADC_IN9/SPI2_SCK
21
Unspecified
PC9/SEG18/ADC_IN0/SPI2_MISO
22
Unspecified
PC10(WKUP5)/SEG19/ADC_IN1/SPI2_MOSI
23
Unspecified

FM33LC013N