Chat

How can I help you?
Explain project
Write a project description
Find schematic issues
Sign up to send

Files

Schematic

Layout

3D View

Schematic of [Multi-layer] JLCPCB Constraints a842
DS1
T6
T2
R6
Resistance
1kΩ
R3
Resistance
1kΩ
R4
Resistance
1kΩ
D9
R2
Resistance
1kΩ
C10
Capacitance
100uF
Y1
D2
C9
Capacitance
100uF
R5
Resistance
1kΩ
D1
R1
Resistance
500 Ω
R1
Resistance
1kΩ
D8
D6
D7
T9
U8
U5
FS1
T4
Q1
C1
Capacitance
Capacitance
C11
Capacitance
1uF
T10
T5
D3
T1
C12
Capacitance
1uF
U10
S1
J3
T3
FS3
FS2
U9
U4
LED2
R8
End of Life
SW2
D12
R7
End of Life
LED1
D10
T8
D11
D13
T7
C1
Capacitance
100pF
SW1
D5
T13
T11
D4
T12
J1
L1
Inductance
Inductance
U1
LED3
BZ2
J2

[Multi-layer] JLCPCB Constraints a842