Chat

How can I help you?
Explain project
Write a project description
Find schematic issues
Sign up to send

Files

Schematic

Layout

3D View

Schematic of [Multi-layer] JLCPCB Constraints a842
DS1
T6
T2
U4
LED2
SW1
D5
T13
R6
Resistance
1kΩ
FS1
T9
T11
R3
Resistance
1kΩ
T10
R4
Resistance
1kΩ
R2
Resistance
1kΩ
D4
LED1
R5
Resistance
1kΩ
T12
R1
Resistance
1kΩ
FS3
FS2
T4
Q1
C1
Capacitance
Capacitance
C11
Capacitance
1uF
T5
R8
End of Life
SW2
D12
D9
U8
R7
End of Life
C10
Capacitance
100uF
D3
T1
C12
Capacitance
1uF
C9
Capacitance
100uF
D10
T3
D11
D8
D13
D6
D7
U5
Y1
D2
U10
S1
D1
R1
Resistance
500 Ω
J3
L1
Inductance
Inductance
C1
Capacitance
100pF
LED3
BZ2
U9
J1
T8
T7
U1
J2

[Multi-layer] JLCPCB Constraints a842