High-Power PSU Compatibility Design


I’ll compare the efficiency and lifetime cost of reused 12 V server PSUs against direct 19.5 V supplies, and check how interchangeable PSU input adapters would fit the architecture. I’ll separate verified ratings from estimates; your exact PSU model and operating load are still needed for a definitive comparison.
The comparison confirms that fewer conversion stages do not automatically mean better efficiency: industrial supplies vary substantially. Dell also documents some 1100 W units as limited to 1050 W at 120 VAC, and programmable 24 V alternatives need their current derating checked before treating them as kilowatt-class 19.5 V supplies.
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Power Conversion Tradeoffs

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Power Conversion Tradeoffs Conclusion
Reused server PSUs plus synchronous boost converters are a credible low-capital-cost architecture, not necessarily the most energy-efficient one. The decision must compare measured wall-to-load efficiency and total installed cost, not the number of external conversion stages. No schematic or layout changes were made for this analysis.
The user reports approximately $15 for used 1100W server PSUs with 12V/85A output. This price and the exact unit rating are user-provided, not independently verified. The existing project specification identifies Dell D750E-S1 as the original 750W target and approximately 180W per slot. Its PSU ratings remain project assumptions here, not newly verified label data. The 1100W model under consideration is unidenti...
Server-PSU reuse still makes economic sense, but for continuous high-load use I’d compare it against direct 19.5 V distribution—including the cost of all boost boards and cooling, not just the $15 PSU. I saved the researched alternatives, efficiency/payback calculations, and interchangeable input-adapter recommendation in your project files: Power Conversion Tradeoffs; no hardware was changed.
Your original specification names a 750 W PSU, while the proposed 1100 W model remains unidentified—what exact model are you considering, and what average total load and hours/day do you expect?

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Project Specification — Rackmount 12V Distribution PSU
Project Overview
Status: Draft
Design a 2U, 10-inch rackmount DC power distribution system that accepts high-current 12V output from repurposed server power supplies and feeds plug-in daughterboard boost modules. Each daughterboard boosts 12V to 19.5V for mini-PC outputs via 5.5mm DC barrel jacks.
Intended Use
Prototype / lab infrastructure for powering multiple mini PCs from centralized server PSU modules. Initial PSU target is Dell D750E-S1, 12V at approximately 65A / 750W, using Bellwether 70012-1111 HPSU connector. Preferred future input capacity is 1100W+.
Manufacturing Constraint
  • Intended manufacturer / assembler: JLCPCB.
  • Prefer JLCPCB/LCSC-sourced parts and validated JLCPCB footprints where practical.
  • User-supplied BoMs are starting points and may be modified for electrical, thermal, safety, or availability reasons.
What the Device Should Do
  • Accept one high-current 12V server PSU input in Rev A.
  • Mechanically target 12 daughterboard connectors, with 8–10 acceptable if thermal/mechanical constraints require it.
  • Let firmware enable/disable each slot.
  • Monitor current and temperature primarily on each daughterboard.
  • Estimate boost efficiency using input-side and output-side current monitoring.
  • Allow firmware to select LM5122 operating mode based on load when supported.
  • Enforce total PSU wattage limits by throttling or disabling high-load modules.
  • Provide local status indication via at least one status LED.
  • Defer Ethernet / Prometheus / web dashboard to Rev B.
Main Features
  • 12V high-current backplane input.
  • Target 12 controlled 12V slot outputs for boost daughterboards.
  • Per-slot electronic switching and hardware protection.
  • Per-daughterboard input/output current measurement using low-cost INA181-class monitors unless replaced by a better JLCPCB-compatible solution.
  • Daughterboard temperature sensing near MOSFETs and inductor.
  • MCU supervision and firmware-configurable slot policies.
  • Status LED.
  • Optional future dual-PSU ORing / HA / active-active support.
  • Optional future Ethernet telemetry with Prometheus-compatible metrics and web dashboard.
System Architecture

Diagram


"Dell D750E-S1<br/>12V node_65A via Bellwether 70012-1111" "Input protection<br/>bulk capacitance<br/>total current sense" "12V high-current busbar / heavy copper plane" "Slot 1 switch + edge connector" "Slots 2-12 switch + edge connector" "Boost daughterboard<br/>INA181 input/output sense<br/>19.5V output" "Boost daughterboards<br/>19.5V outputs" "Pico 2 / RP2350 supervisor" "Status LED" "PSU present / enable / fault signals"
Hardware Subsystems
PSU Input
  • Required mating connector: Bellwether 70012-1111 HPSU connector for Dell D750E-S1.
  • User supplied Bellwether product page and PDFs for package/spec/2D drawing.
  • First revision is single-PSU electrically; second stacked PSU is mechanical/future Rev B consideration.
  • Input stage needs hot-plug/inrush consideration, bulk capacitance, PSU sense/control pin handling, and transient protection.
12V Distribution
  • Treat each 180W slot as approximately 16.7A at 12V assuming 90% boost efficiency.
  • Full simultaneous 8–12 slot operation exceeds a single 750W PSU.
  • Board must support firmware power allocation rather than assuming every slot can run at 180W at once.
Slot Switching and Protection
  • Use per-slot high-side protection/eFuse/hot-swap/load-switch circuitry sized for actual slot current.
  • Previously considered TPS25952x-class eFuse may be undersized and needs replacement or careful derating.
  • Each slot should include enable control, fault/status reporting where practical, and connector-rated current margin.
  • Firmware throttling is useful but hardware current limiting / fusing remains required.
Boost Daughterboard
  • User-supplied LM5122 BoM targets a single 12V-to-19.5V boost daughterboard.
  • Two INA181 current-sense amplifiers per daughterboard are preferred initially: one input-side and one output-side.
  • Daughterboard should include thermistors near MOSFETs and inductor.
  • Daughterboard should expose EN, MODE, FAULT, PGOOD, telemetry, and VOUT sense through the edge connector as needed.
Monitoring
  • Drop distribution-board INA3221 as the primary per-slot monitoring approach.
  • Prefer modular per-daughterboard monitoring.
  • Consider analog telemetry back to main MCU for Rev A; local ADC/digital telemetry can be reconsidered if analog noise or pin count becomes problematic.
MCU / Networking
  • Rev A: Pico 2 / RP2350-class controller is acceptable.
  • Ethernet is deferred to Rev B.
  • MCU handles slot enable, status LED, fault logging, power-budget decisions, and optional mode selection.
Interfaces and Connections
  • PSU input: Dell D750E-S1 via Bellwether 70012-1111.
  • Slot connector: 32-pin edge connector, currently rated by user at 3A/contact.
  • Proposed slot power allocation: 10 VIN and 10 GND contacts, giving 30A theoretical per rail side before derating.
  • Separate AGND is dropped for now; use single GND plus careful Kelvin/current-sense routing.
  • Daughterboard output: 19.5V up to ~10A, 5.5mm barrel jack.
  • Management Rev A: local MCU/USB/debug.
  • Management Rev B: Ethernet.
Power and Runtime Expectations
  • Input: 12V nominal, 65A for Dell D750E-S1; future 1100W+ PSU target.
  • Per mini-PC output target: 19.5V up to 10A, but practical max stated as approximately 180W.
  • System should enforce aggregate output power under available PSU limit.
Power Tree and Power Budget

Table


ItemAssumptionResult
One slot output power19.5V × 9.23A equivalent~180W
Boost efficiency assumption90%—
One slot 12V input current180W / (12V × 0.90)~16.7A
8 slots at full load8 × 180W1440W output; ~133A from 12V
12 slots at full load12 × 180W2160W output; ~200A from 12V
Dell D750E-S1 input12V × 65A~780W theoretical, 750W rated
Full-load slots supported by 750W PSU750W / 180W~4 slots before margin/efficiency limits
Conclusion: 12 physical slots require oversubscription. Firmware must allocate power budgets and reduce/disable loads when total PSU capacity is reached.
Manufacturing and Assembly Expectations
  • High-current paths should use heavy copper, wide pours, busbars, or bolted copper conductors as needed.
  • Use connector current ratings with margin and temperature derating.
  • Add test points for input voltage, MCU rails, slot enable lines, current-sense outputs, and fault signals.
  • Design must account for airflow in a 2U chassis.
  • Prefer JLCPCB Basic/Extended parts where suitable, but do not sacrifice current rating, thermal margin, or safety protection for assembly convenience.
Firmware-Relevant Hardware Requirements
  • Per-slot enable control.
  • Per-daughterboard input and output current readings.
  • Per-daughterboard temperature readings.
  • Slot fault inputs if protection devices support them.
  • PSU present/good and optional enable/control signals.
  • Nonvolatile configuration for per-slot limits and names.
  • Local status LED.
  • Ethernet metrics deferred to Rev B.
Physical Design Expectations
  • 2U rackmount height, 10-inch width, approximately 260 mm depth target.
  • ABS 3D-printed enclosure with approximately 5 mm wall thickness.
  • Internal usable width approximately 244 mm.
  • Dell PSU width approximately 86.5 mm, leaving about 157.5 mm bay width for daughterboard slots.
  • PSU depth approximately 196.5 mm and height approximately 38.5 mm.
  • Two PSUs can stack vertically for future Rev B but Rev A is single PSU electrically.
  • Daughterboards stand vertically and run front-to-back; edge connectors also run front-to-back.
  • Daughterboard target width/chassis-height usage: about 50 mm excluding edge-finger engagement.
  • Barrel jack outputs exposed toward rear of chassis.
  • Airflow between daughterboards is a critical constraint.
Important Design Decisions
  • Rev A: single PSU, Ethernet deferred, dual-PSU HA deferred.
  • Target 12 slots, but reduce to 8–10 if mechanical or thermal constraints require.
  • Per-daughterboard monitoring is preferred over central INA3221 monitoring.
  • Use two low-cost INA181 monitors per daughterboard unless a better JLCPCB-compatible two-channel option is selected.
  • Drop separate AGND for now.
  • JLCPCB-compatible component selection is a constraint, but high-current safety and thermal margin take priority.
Assumptions
  • Boost converters are daughterboards, not all implemented on the main distribution PCB.
  • Output barrel jacks are downstream of boost modules.
  • The main board distributes 12V and controls/monitors slots.
  • Initial schematic may use one representative slot and one representative daughterboard interface, then replicate once validated.
  • Exact Dell PSU control/sense pinout and Bellwether connector footprint must be verified from supplied files before wiring.
Change Notes
  • Added Bellwether connector source files and known product-spec data.
  • Updated Rev A to defer Ethernet and dual PSU HA.
  • Dropped distribution-board INA3221 direction.
  • Added per-daughterboard current monitoring strategy.
  • Added chassis and daughterboard mechanical constraints.
  • Project Overview

  • Intended Use

  • Manufacturing Constraint

  • What the Device Should Do

  • Main Features

  • System Architecture

  • Hardware Subsystems

  • PSU Input

  • 12V Distribution

  • Slot Switching and Protection

  • Boost Daughterboard

  • Monitoring

  • MCU / Networking

  • Interfaces and Connections

  • Power and Runtime Expectations

  • Power Tree and Power Budget

  • Manufacturing and Assembly Expectations

  • Firmware-Relevant Hardware Requirements

  • Physical Design Expectations

  • Important Design Decisions

  • Assumptions

  • Change Notes