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Fresh Placement Execution Plan — Pico Macro Keyboard PCB
Scope
Fresh-place the existing Pico/RP2350 macro keyboard design on a 100 mm × 100 mm rounded-rectangle, 4-layer PCB. Preserve a clean user-facing top side while using the bottom side for the MCU and most supporting electronics.
Starting Observations
  • Board setup is already 100 mm × 100 mm, 4 copper layers, rounded rectangle with ~7 mm corner radius.
  • Current placement contains multiple off-board/out-of-bounds items and a Raspberry Pi logo/graphic with an extremely large bounding box. Reset/remove/resize decorative graphics before placement work.
  • Current review shows many airwires, several overlapping-copper errors, missing MPNs for many generic passives/templates, floating-pin warnings, and one unannotated PCB/graphic item.
Placement Strategy
  1. Mechanical frame first
    • Treat board origin as the board center and keep all functional components inside approximately x/y = ±47 mm, with extra clearance in rounded corners.
    • Place mounting standoffs/holes H1–H4 near corners, nominally around (±43 mm, ±43 mm), with copper/component keepouts and screw-head/washer clearance.
    • Place USB-C connector J1 on the rear/edge of the board, flush to the edge, with mechanical insertion clearance.
  2. Top-side user interface
    • Keep top side clean: switches, per-key RGB LEDs, rotary encoders, slider/potentiometer, visible status LED/light pipe only as required.
    • Arrange the 12 Kailh Choc switches SW2–SW13 in a regular 3 × 4 macro-keypad grid using consistent pitch, rotation, and keycap clearance.
    • Place one WS2812-2020 LED U4–U15 associated with each key, centered or optically aligned to its switch/diffuser position, all with consistent orientation and a sequential data-chain path.
    • Put switch diodes D2–D13 on the bottom side directly below/adjacent to their corresponding switches where possible to keep the top side visually clean while keeping matrix loops short.
    • Place rotary encoders SW14 and SW15 ergonomically near the grid, preferably along the right side or upper-right area, with knob/shaft keepouts and enough finger clearance.
    • Place RV1 where user-accessible and mechanically supported, preferably along the top or side edge depending on desired slider direction.
  3. Bottom-side functional electronics
    • Place U1 RP2350A on the bottom side roughly under the center of the switch/controls cluster to minimize fanout distance to rows, columns, LED data, encoders, and slider signals.
    • Group U3 flash and its capacitors C19/C20 immediately adjacent to U1 QSPI pins. Keep QSPI traces short and direct.
    • Group Y1 crystal, C15/C16, and R7 immediately beside U1 XIN/XOUT pins. Keep this area isolated from USB, LED data, and switching-regulator nodes.
    • Ring U1 with local decoupling: place C1–C6/C10 at +3V3/IOVDD-related power pins, C7–C9/C13 at +1V1/DVDD/VREG-related pins, and C11/R1/R2 for ADC_AVDD near the analog supply pin.
    • Place regulator/power input group close to USB entry but not under sensitive clock/ADC routes: J1 → D1 → C18/VSYS → U2/L2/C17 → +3V3 distribution. Keep L2 tight to U2 LX pins and high-current loops compact.
    • Place Q1/R15/R16/R17/C21 GPIO29/VSYS sense or control group near U1 ADC/control entry, away from L2 and WS2812 data.
    • Place reset/boot/user button SW1, boot/run/passives, SWD header PROG, R4/R6, status LED LED1/R18, and USB passives R3/R10/R11/R12 by function and accessibility.
    • Place encoder debounce networks R20–R22/C22–C24 near SW14 and R23–R25/C25–C27 near SW15, on the bottom side under/near each encoder but clear of mechanical tabs.
  4. Layer-use intent
    • Top copper: short local switch/LED connections where necessary, minimal visible routing, optional ground pour where it does not affect appearance/LED optics.
    • Inner layer 1: continuous GND reference plane with stitching near U1, LEDs, USB, regulator, and mounting holes.
    • Inner layer 2: +3V3/VSYS distribution and selected low-speed signal escapes as needed; keep regulator switching node local only.
    • Bottom copper: main routing layer for MCU fanout, matrix rows/columns, QSPI, USB, encoder/slider/support signals, and dense passives.
  5. Routing priorities after placement
    • Route power entry and regulator current loops first.
    • Route U1 decoupling and crystal next.
    • Route USB DP/DM as a short matched differential pair through R3/R10.
    • Route QSPI flash short and compact.
    • Route matrix rows/columns with regular channels and short diode connections.
    • Route WS2812 data in physical chain order U4 → U5 → … → U15 and provide robust LED power/ground rails.
    • Route encoders, slider, reset/boot, SWD, and status LED last, preserving analog/clock quiet zones.
  6. Cleanup and review loop
    • Resolve all component overlaps, off-board placements, and oversized silkscreen/graphic bounds before detailed routing.
    • Run DRC/ERC after rough placement, after critical routing, and after final cleanup.
    • Review and fix overlapping copper, airwires, floating pins/no-connect intent, missing designators, and missing MPN/manufacturing data before release.

  • Scope

  • Starting Observations

  • Placement Strategy