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PB3
PJ12
PF14
PF9
VSSDSI
PH7
PG14
PH9
PB11
PI5
PI11
PE1
PG10
VSS
PA4
PC1
VSS
PB6
PD12
PD4
DSIHOST_D0N
VCAP_1
PH0
PE6
PD7
PB2
PE4
VSS
VSS
VSS
PA1
PF6
PJ3
VSS
DSIHOST_D0P
PE15
PA0
PA7
PF15
PG3
PF2
PC13
PB14
PB4
VDD
PE12
VSS
PA8
VSS
VDD12DSI
PB13
VCAPDSI
PF11
PI0
PC2
PH12
VCAP_2
PG12
PA15
DSIHOST_CKN
PB10
VSS
PA10
PI14
PI9
PH11
PF12
PE5
PD3
PG8
PH14
PC15
PE10
PC8
PH5
PK5
PE3
PD11
VSS
VDDDSI
VSS
PJ5
VDD
PI10
PJ2
PF4
PC14
PH13
PD8
PD0
VREF+
PF5
VSS
PK6
PB9
PD1
VSS
PG2
PE0
PC6
PB5
VDDSDMMC
PG4
PA11
PH15
PK3
BOOT0
PB15
DSIHOST_D1P
VDD
PA12
PD14
VDD
PJ13
PJ14
PD13
PI6
VSS
VDD
PD2
PF8
VSS
PE13
PG13
PI4
PJ4
PH8
PF3
PG5
PF7
VSS
PK4
PH2
PF1
PD15
PH6
BYPASS_REG
PH4
PE2
VDD
PI3
VBAT
PC11
PA13
PC0
PC9
PB0
PC5
VDD
PI1
PI15
PG15
PF10
PC7
VDD
PJ1
PB1
PI12
PG0
PH10
PC12
PG6
PA3
DSIHOST_CKP
PB12
VDD
PG7
PC3
PE7
PD10
NRST
PJ15
VSSA
VDD
PE14
VSS
PI13
PE8
PD6
PG11
PG9
PF13
PB8
PC4
PJ0
PA9
PG1
PA2
PB7
DSIHOST_D1N
PD5
PE9
PH1
PI8
PDR_ON
VDD
VDD
PE11
VREF-
PA14
VDD
VDD
PI2
PA5
VDDA
PD9
VDDUSB
PK7
PF0
PI7
PH3
VDD
PC10
PA6
VDD
VSS

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Documents

    Documents are markdown text files which describe project goals, capture details, or even simulation outputs.

    Assets

    TFBGA-216_13x13mm_Layout15x15_P0.8mm.step

    TFBGA-216_13x13mm_Layout15x15_P0.8mm.step

    TFBGA-216_13x13mm_Layout15x15_P0 Model3D Model
    kicad_mod

    TFBGA-216_13x13mm_Layout15x15_P0.8mm.kicad_mod

    TFBGA-216_13x13mm_Layout15x15_P0 FootprintFootprint
    svg

    STM32F769NIHx Symbol.svg

    STM32F769NIHx SymbolDefault

    STM32F769NIHx

    STM32F769NIHx thumbnail
    STMicroelectronics Arm Cortex-M7 MCU, 2048KB flash, 512KB RAM, 216 MHz, 1.7-3.6V, 159 GPIO, TFBGA216 Arm Cortex-M7 STM32F7 STM32F7x9 TFBGA13x13mmLayout15x15P0.8mm

    Properties

    STMicroelectronics NV

    U

    st.com/resource/en/datasheet/stm32f769ni.pdf

    STM32F769NIHx

    TFBGA-216_13x13mm_Layout15x15_P0.8mm

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